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E2CDA: Type II: Memory, Logic, and Logic in Memory Using Three Terminal Magnetic Tunnel Junctions

E2CDA: Type II: Memory, Logic, and Logic in Memory Using Three Terminal Magnetic Tunnel Junctions
E2CDA:类型 II:使用三端子磁性隧道结的存储器、逻辑和存储器中的逻辑
批准号:
1639921
负责人:
Marc Baldo
金额:
$40.0万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2016
资助国家:
美国
项目状态:
已结题
起止时间:
2016-10-01 至 2019-09-30
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中文摘要
翻译
现代处理器在读取内存时消耗的能量至少是执行简单算术时的100倍。这种“内存墙”的起源是处理器和内存速度之间越来越大的差距。系统通过支持逻辑(如缓存)来消耗能量来弥补这种速度差距,并且在等待内存时在未使用的处理器周期中消耗更多的能量。一个潜在的解决方案是使用自旋而不是电荷来存储和处理信息。自旋电子学在逻辑和存储器中的双重能力将用于解决两个任务中的“存储器墙”:首先是将存储器写入时间从~10ns减少到1-10ps,其次是将一些逻辑功能直接集成到存储器阵列中。重点将是演示乘法和累积电路,这是所有逻辑系统的基础,但这里针对卷积神经网络进行了优化。通过工业研究人员的研究访问以及安排学生实习和最终就业,将促进工业联系。教育使命的其他目标是:1)激发K-12学生对科学和工程的职业兴趣;2)为本科生提供前沿研究机会;3)通过课程开发和跨学科合作为学生未来的工程职业做好准备。本计划的技术目标将采用合成反铁磁体的讯问和电子操纵新技术来实现,从而提高磁隧道结逻辑和存储的速度。克服集成拓扑和磁性绝缘体的材料挑战将减少能量耗散到热力学极限。在拓扑绝缘体中通过高效自旋电流产生的低开关能量与合成反铁磁体中的快速开关相结合,有望提供低于1fJ.ps的能量延迟产品。
英文摘要
Modern processors dissipate at least 100× more energy when reading memory than performing simple arithmetic. The origin of this "memory wall" is the increasing gap between processor and memory speeds. Systems dissipate power making up for this speed gap with support logic such as caches, and further power is consumed in unused processor cycles while waiting for memory. One potential solution is to use spin rather than charge to store and process information. The dual capabilities of spintronics in logic and memory will be used to address the "memory wall" in two tasks: first by reducing memory write times from ~10ns to 1-10ps, and second by incorporating some logical functions directly within memory arrays. The focus will be to demonstrate multiply and accumulate circuits the foundation of all logic systems, but optimized here for convolutional neural networks. Industrial connections will be fostered through research visits from industrial researchers and the placement of students for internships and eventual employment. The additional aims of the educational mission are: 1) to inspire career interest of K-12 students in science and engineering; 2) to provide undergraduate students with cutting-edge research opportunities; and 3) to prepare students for future engineering careers through curriculum development and interdisciplinary collaboration. The technical goals of this program will be realized using new techniques for the interrogation and electrical manipulation of synthetic antiferromagnets, thereby enhancing the speed of magnetic tunnel junction logic and memory. Overcoming the material challenges of integrating topological and magnetic insulators will reduce the energy dissipation towards thermodynamic limits. The combination of low switching energy via efficient spin current generation in topological insulators, and fast switching in synthetic antiferromagnets is expected to deliver energy-delay products below 1fJ.ps.
期刊论文(8)
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科研奖励(0)
会议论文
A logic-in-memory design with 3-terminal magnetic tunnel junction function evaluators for convolutional neural networks
用于卷积神经网络的具有三端磁隧道结函数评估器的内存逻辑设计
DOI: 10.1109/nanoarch.2017.8053724
发表时间: 2017
期刊: 2017 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH
影响因子: --
作者: [Dutta, Sumit, Siddiqui, Saima A., Buttner, Felix, Liu, Luqiao, Ross, Caroline A., Baldo, Marc A.]
通讯作者: Baldo, Marc A.
DOI: 10.1103/physrevlett.119.077702
发表时间: 2017-08-18
期刊: PHYSICAL REVIEW LETTERS
影响因子: 8.6
作者: [Han, Jiahao, Richardella, A., Liu, Luqiao]
通讯作者: Liu, Luqiao
DOI: 10.1103/physrevapplied.6.054001
发表时间: 2016-11-02
期刊: PHYSICAL REVIEW APPLIED
影响因子: 4.6
作者: [Finley, Joseph, Liu, Luqiao]
通讯作者: Liu, Luqiao
The Spatial Resolution Limit for an Individual Domain Wall in Magnetic Nanowires
磁性纳米线中单个畴壁的空间分辨率极限
DOI: 10.1021/acs.nanolett.7b03199
发表时间: 2017
期刊: Nano Letters
影响因子: 10.8
作者: [Dutta, Sumit, Siddiqui, Saima A., Currivan-Incorvia, Jean Anne, Ross, Caroline A., Baldo, Marc A.]
通讯作者: Baldo, Marc A.
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