SHF: Small: De-optimizing Compilation for Many-Simple-Core Processors

现有的编译技术不太可能充分释放新的多简单核体系结构的潜力，在这种体系结构中，处理器由数十个、数百个或更多的核组成，这些核没有细粒度的指令级并行性。根本原因是，传统的编译技术在很大程度上是为了最大化单线程性能而设计的，而当多个单核处理器上的程序经常运行数百个甚至更多线程时，相同的策略可能会阻碍实现最佳整体性能。当资源得到充分利用时，多单核处理器通常可以提供最高的性能。但是，以传统方式编译的线程可以使用所有资源来最大化其自身的性能。当应用于数百个线程时，资源需求累积起来，并将产生资源瓶颈，这比单个线程的性能更有可能成为主要的性能问题。更广泛地说，什么是编译器优化的问题需要在多个单核处理器的新环境下重新定义，该研究改进了单线程性能和整体资源利用率之间的权衡。该项目包括对使现有编译器和代码优化技术适应新的多单核处理器所需的技术和策略进行系统研究，并开发专门面向提高新体系结构上的资源利用率的新的优化技术和策略。具体地说，研究人员研究了编译器中共享资源利用的建模、重新定义现有技术的盈利分析的编译器优化和代码转换，以及协调编译器转换及其参数值的选择的优化策略，以“取消优化”或“优化”单线程以提高整体性能。

Existing compilation techniques are unlikely to release the full potentials of the new many-simple-core architectures, where a processor consists of tens, hundreds or more cores that do not have fine grain instruction-level-parallelism. The fundamental reason is that traditional compilation technology is largely designed to maximize single-thread performance while the same strategy will likely hinder the realization of the best overall performance when programs on many-simple-core processors routinely run hundreds or even more threads. A many-simple-core processor usually delivers the highest performance when its resource is fully utilized. However, a thread compiled in the traditional way has all resources at its disposal to maximize its own performance. When applied to hundreds of threads, the resource requirement adds up and will create a resource bottleneck that is much more likely than the performance of single thread to be the main performance issue. More generally speaking, the question of what is compiler optimization needs to be redefined in the new context of many-simple-core processors.This research improves the tradeoff between single-thread performance and overall resource utilization. The project includes a systematical study of techniques and strategies that are needed to adapt existing compiler and code optimization techniques to the new many-simple-core processors, and the development of new optimization techniques and strategies that are oriented specifically to improve resource utilization on the new architecture. Specifically, the investigators study the modeling of shared resource utilization in compiler, compiler optimizations and code transformations that redefine the profitability analysis of existing techniques, and optimization strategy that orchestrates the selection of compiler transformations and their parameter values to "de-optimize" or "optimize" single thread to improve overall performance.