SHF: Small: Minimally Invasive Error Detection/Correction for Runtime Margin Elimination

微处理器构成了我们日常生活中大多数电子系统的核心，它们负责这些电子设备的大部分功耗。在这项研究中，PI提出了一种有前途的方法，使用一种名为Razor的方法来显着降低功耗。使用硅半导体工艺制造的现代芯片的问题之一是，这些芯片上的电子元件（例如晶体管、栅极等）的性能在其计算速度方面变得非常不可预测。这意味着有些芯片运行得快，而有些芯片运行得慢。 目前，我们通过以被认为对所有可能的芯片都安全的低速运行所有芯片来解决这种性能不确定性。然而，这对于大多数可以以更快的性能运行的芯片来说是巨大的浪费。我们通过降低这些芯片的工作电压来利用它们的性能裕度，使它们仍然满足相同的安全性能约束，但工作效率明显提高。 已经证明，这种方法可以节省多达50%的电子电路的功耗。该提案提出了新的方法，使芯片能够自动确定其最低可能的工作电压，同时仍然满足所需的性能。 它通过逐渐降低电源电压来实现，直到芯片开始出现故障。然后检测并纠正这些故障，并告诉电压控制器它已经达到电压降低的极限。在该提案中，PI概述了一种以更有效的方式执行错误检测和纠正的新方法。所提出的方法如果成功并转移到工业中，可以显着降低处理器和其他电子电路的能耗。所提出的技术的显著更高的能源效率可以带来许多社会效益。这些技术将使电子电路能够更有效地利用能量。电子电路（计算机、手持设备、服务器群等）的功耗是目前全国增长最快的地区总体能源需求。因此，减少电子产品的功耗是能源政策的一个关键问题，可以减少我们对石油和其他不可再生能源的依赖。此外，所提出的方法将解决设计电路的关键需求，这些电路不受芯片中不断增加的不确定性的影响，因为我们进一步扩展了硅技术。这可能在扩展摩尔比例定律方面发挥重要作用，并对半导体行业和国家产生重大利益。的经济。作为这项研究的一部分，PI将通过实验室演示和图尔斯参观来扩展我们最近与高中学生接触的做法，以使这些学生为低功耗计算做好准备。

Microprocessors form the heart of most electronic systems that pervade our daily life and they are responsible for the bulk of the power consumption of those electronics. In this research, the PIs propose a promising method to significantly reduce that power consumption, using an approach called Razor. One of the issues with modern chips manufactured using silicon semi-conductor processes is that the performance of the electronic components (such as transistors, gate, etc) on these chips has become very unpredictable in terms of their computational speed. This means some chips will run fast while others will run slow. Currently, we address this performance uncertainty by operating all chips at a slow speed that is considered safe for all possible chips. However, this is hugely wasteful for most chips which can operate at a much faster performance. We harness the performance margin of these chips by lowering their operating voltage, such that they still meet the same safe performance constraint, but operate significantly more energy efficiently. It has been demonstrated that this approach can save as much as 50% of the power consumption of an electronic circuit. The proposal suggests new ways for the chip to automatically determine its lowest possible operating voltage while still meeting the needed performance. It does so by progressively lowering the supply voltage till the chip start to fail. These failures are then detected and corrected and tell the voltage control that it has reached the limit of voltage reduction. In this proposal, the PIs outline a new method to perform this error detection and correction in a more efficient manner. The proposed methods, if successful and transferred to industry, could significantly reduce energy consumption of processors and other electronic circuits. The significantly larger energy efficiency of the proposed techniques could bring about a number societal benefits. These technique will enable more effective usage of energy for electronic circuits. Power consumption of electronic circuits (computers, handhelds, servers farms etc.) is currently the fastest growing component of the nation?s overall energy demand. Hence, reducing power consumption of electronics is a critical concern for energy policy and could reduce our dependence on oil and other non-renewable energy sources. In addition, the proposed method will address a critical need to design circuits that are immune to the increasing uncertainty in chips as we scale the silicon technology further. This could play an important role in extending Moore's law of scaling and have significant benefits for the semiconductor industry and the nation?s economy. As part of this research, the PIs will expand our recent practices of engaging with high school students through lab demonstrations and tours to prepare these students for low power computing.