CSR: Small: DARP: Promoting Energy Efficient System Design Through a Dynamically Adaptable Resilient Pipeline

晶体管行为的可变性，包括延迟，传统上是通过电路级过于保守的设计选择来减轻的，这是以牺牲能源效率为代价的。该项目的目标是通过研究可变延迟管道，开发在体系结构层面更有效地管理延迟的技术。该项目的长期目标是提高计算机的能源效率。该项目涉及管理应用程序引起的管道延迟可变性，包括在核心级别和系统级别，概述了促进可持续计算的变革方法。项目倡导跨层电路-建筑设计主题，这在未来的系统设计中是不可或缺的。本项目的各种研究任务通过展示三个有趣的轴来探索流水线微处理器中的电路级延迟变化：(a)在程序的不同阶段，给定管道阶段内的时间延迟变化；(b)空间——微处理器不同管道级之间的明显延迟分布；(c)工作负载——在不同工作负载中看到的不同管道阶段的独特延迟概况。这些都经过仔细分析，以设计动态适应性弹性管道（DARP），它概述了推动流水线微处理器设计节能前沿的下一波创新。透过跨层基础设施的教育活动，这项计划将有助于培养未来的工作人员，使他们能够在可持续发展的电脑设计中实践跨层主题。

Variability of transistor behavior including delay has traditionally been mitigated through overly conservative design choices at the circuit level that come at the expense of energy efficiency. The objective of this project is to develop techniques for more effectively managing delay at the architectural level through the study of variable-delay pipelines. The long-term goal of the project is to improve the energy efficiency of computers.This project involves managing application induced pipeline delay variability, both at the core level and at the system level, outlining a transformative approach to promote sustainable computing. The project advocates cross-layer circuit-architectural design themes, which are becoming indispensable for future system designs. Various research tasks of this project explore circuit level delay variability in a pipelined microprocessor by demonstrating three intriguing axes: (a) temporal--delay variation within a given pipe stage during different phases of a program; (b) spatial--distinct delay distributions among different pipe stages of a microprocessor; and (c) workload--unique delay profiles of various pipe stages seen among various workloads. These are carefully analyzed to design a Dynamically Adaptable Resilient Pipeline (DARP), which outlines a next wave of innovation in pushing the energy efficient frontier of pipelined microprocessor design. Through educational activities with the cross-layer infrastructure, this project will be instrumental in creating a future work force well placed to exercise cross-layer themes in sustainable computer design.