EAGER: A novel approach to produce graphene for fabricating electronic devices
EAGER: A novel approach to produce graphene for fabricating electronic devices
批准号:
1445858
负责人:
Zengjun Chen
金额:
$8.0万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2014
资助国家:
美国
项目状态:
已结题
起止时间:
2014-09-15 至 2018-08-31
中文摘要
标题:一种生产石墨烯的新方法,用于制造电子器件1)非技术摘要减少开关次数是实现高性能电子器件的最重要要求之一。在这方面,为这类设备选择先进的材料至关重要。石墨烯是一种只有一层碳原子排列成蜂窝结构的材料。自2004年发现石墨烯以来,石墨烯表现出了许多优异的性能,包括超高的电子迁移率,这意味着使用石墨烯制造的电子器件的响应时间可以比其他材料短得多。然而,在制造这样的电子器件之前,生产大面积和高质量的石墨烯薄膜是具有挑战性的。该项目将试图开发一种低成本、易于设置的新方法来生长石墨烯薄膜。这个想法是将碳化硅(碳化硅)装入有氧气流过的高温炉中。碳化硅会被氧化,形成一层二氧化硅(SiO_2)。石墨烯薄膜有望在碳化硅和二氧化硅之间生长。已经证明,它们之间确实存在碳原子。然而,目前还没有关于蜂窝状的大面积碳原子,即石墨烯的报道。该项目的目标是通过在生长过程中尝试不同的参数来生产大面积的石墨烯薄膜。还提出了生长具有特定形状的石墨烯薄膜的方法。石墨烯生产后,将在生长的石墨烯上制造电子器件,并测试其响应时间等性能。如果成功,基于石墨烯的电子设备的成本将低得多。由于该项目将在HBCU学校进行,将鼓励代表人数不足的学生参与,他们将接触到基于石墨烯的电子产品的前沿。该项目还将为许多跨学科的学生提供一个学习半导体相关课程的平台。2)技术摘要该项目旨在开发一种生产二维碳材料的新方法:石墨烯。目前的方法需要高温(1300oC)或高真空(10-8Torr)。小型研究机构很难负担得起这样的设施。这种成本较低的新方法源于一些小组报道的在热氧化过程中碳原子可以在碳化硅(SiC)和二氧化硅(SiO_2)之间积累的事实。PI以前的实验也表明,SIC上横向MOSFET的沟道迁移率有时高于其公认的值(160cm2/V.s比35cm2/V.s),这表明可能涉及另一种机制。建议在热氧化过程中在碳化硅和二氧化硅之间生成较小的石墨烯薄片,这是制造MOSFET的关键步骤。该项目建议调查异常高的通道迁移率是否归因于石墨烯。这个想法是测试在显示出更高沟道迁移率的MOSFET的SiO_2层下是否存在石墨烯薄片。预计这种关联将会建立起来。更重要的是,通过调节氧化条件,如温度(900~1200oC)、压力(1atm~0.01atm)、流量和氧化时间,可以在碳化硅和二氧化硅之间生长出更加均匀的石墨烯薄膜。此外,还提出了用离子注入的方法来制备具有特定形状的石墨烯薄膜。其目标是开发一种新的石墨烯生产方法,这种方法可以被大多数机构完成,并易于用于制造电子器件,特别是MOS器件和射频(RF)器件。这些设备的原型将进行演示和测量。该项目将对基于石墨烯的电子以及其他相关领域产生重大影响。
英文摘要
Title: A novel approach to produce graphene for fabricating electronic devices1) Non-technical AbstractDecreasing the switching times is one of the most important requirements for enabling high performance electronic devices. In this regard, selecting advanced materials for such devices is vitally important. Graphene is a type of material with only one layer of carbon atoms packed in a honeycomb configuration. Since its discovery in 2004, graphene has shown many excellent properties, including a super high electron mobility, which means that the response time of electronic devices fabricated using graphene can be much shorter than on other materials. It is challenging, however, to produce large area and high quality graphene films prior to building such electronic devices. This project will try to develop a new method, low cost and easily set up, of growing graphene films. The idea is loading silicon carbide (SiC) into a high-temperature furnace with oxygen gas flowing through. SiC will be oxidized and a layer of silicon dioxide (SiO2) can be formed. Graphene films are expected to be grown between the SiC and SiO2. It has been shown that carbon atoms do exist between them. However, it is not yet reported that large area carbon atoms packed like honeycomb, i.e. graphene, are available. The goal of this project is to produce large area graphene films by trying different parameters during the growth. It is also proposed that graphene films with defined shapes can be grown. After graphene is produced, electronic devices will be fabricated on the grown graphene and their performance, such as response time, will be tested. If successful, the cost of electronic devices on graphene will be much lower. Since the project will be carried out at an HBCU school, underrepresented students will be encouraged to participate and they will be exposed to the frontier of graphene-based electronics. This project will also serve as a platform for many interdisciplinary students to learn semiconductor-related courses.2) Technical AbstractThis project aims to develop a new method for producing a 2-D carbon material: graphene. Current methods require either high temperatures (1300oC) or high vacuum (10-8 Torr). It is difficult for small research institutions to afford such type of facilities. The new method which is less costly, originates from the fact that carbon atom can accumulate between silicon carbide (SiC) and silicon dioxide (SiO2), reported by some groups, during the thermal oxidation process. Previous experiments conducted by the PI have also demonstrated that the channel mobility of lateral MOSFET on SiC sometimes is higher than its widely recognized values (160 cm2/V.s vs. 35 cm2/V.s), suggesting another mechanism may be involved. Smaller graphene flakes are suggested to be produced between SiC and SiO2 during the thermal oxidation process, a key step during the fabrication of MOSFETs. This project proposes to investigate whether the unusually high channel mobility is attributed to graphene. The idea is testing whether graphene flakes exist under the SiO2 layer of MOSFETs that show higher channel mobility. A correlation is expected to be built. More importantly, an attempt will be made to grow more uniform graphene films between SiC and SiO2 by adjusting the oxidation conditions such as temperature (900 ~ 1200oC), pressure (1 atm ~ 0.01 atm), flow rate, and oxidation time. Graphene films with defined shapes are also proposed to be produced with the help of ion-implantation. The goal is to develop a new graphene production approach which can be accomplished by most institutions and easily employed for fabricating electronic devices, particularly MOS devices and radio-frequency (RF) devices. Prototype of those devices will be demonstrated and measured. This project will have a great impact on graphene-based electronics, as well as other related fields.
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