EAGER: Towards Low-Latency Low-Power Heterogeneous Memory Access
EAGER: Towards Low-Latency Low-Power Heterogeneous Memory Access
批准号:
1457506
负责人:
Meikang Qiu
金额:
$6.29万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2014
资助国家:
美国
项目状态:
已结题
起止时间:
2014-08-01 至 2016-07-31
中文摘要
这个项目将探讨异构存储器架构的应用,以降低功耗,同时保持足够的响应时间在嵌入式计算机系统。 与处理元件的速度相比,存储器设备的较慢的响应时间被认为是主要的性能瓶颈。存储器设备所使用的功率,尤其是静态功率,被认为是计算机中能量消耗的主要来源。 存在各种不同类型的存储器技术,每种技术占据由诸如存储器访问等待时间、存储器带宽、功耗、存储器寿命和存储器设备的成本之类的参数表示的多维权衡空间中的离散点。 异构存储器系统代表了一种潜在的变革性发展,因为组合几种不同类型的存储器开辟了更广泛的权衡空间。 这个初步研究的重点是有效地利用异构存储器类型的暂存存储器。预期成果包括:1)集成片上静态随机存取存储器(SRAM)、磁性随机存取存储器(MRAM)、零电容RAM(Z-RAM)技术以及片外DRAM的新型异构存储器层次结构。2)一组算法,用于实现最佳内存访问速度或有效空间利用的分配。3)一个仿真工具包,集成了常用的仿真基准测试,例如MiBench、PARSEC和MediaBench。这项研究的更广泛影响包括有可能提供技术,降低当前嵌入式计算应用的能耗,并可能在能源、功耗和散热限制范围内实现更先进的未来嵌入式计算系统。 该项目将研究与研究生教育相结合,无论是在课堂上还是通过学生直接参与研究。 它将包括与IBM、太平洋西北实验室和英特尔的研究人员的合作。
英文摘要
This project will explore the application of heterogeneous memory architectures to reduce power consumption while maintaining adequate response times in embedded computer systems. The slower response times of memory devices as compared to the speeds of processing elements is recognized as a major performance bottleneck. Power used by memory devices, especially static power, is recognized as a major source of energy consumption in computers. There are a variety of different types of memory technologies, each occupying a discrete point in a multidimensional trade-off space represented by parameters such as memory access latency, memory bandwidth, power consumption, memory lifetime, and cost of memory devices. Heterogeneous memory systems represent a potentially transformative development because combining several different types of memory opens up a much broader range of this trade-off space. The focus of this preliminary study is on efficient use of heterogeneous memory types in a scratch-pad memory. Expected outcomes include: 1) A new heterogeneous memory hierarchy that integrates on-chip Static Random Access Memory (SRAM), Magnetic Random Access Memory (MRAM), Zero-capacitor RAM (Z-RAM) technologies, as well as off-chip DRAM. 2) a set of algorithms that achieve allocation for optimal memory access speed or efficient space utilization. 3) a simulation toolkit that integrates commonly used simulation benchmarks, such as MiBench, PARSEC, and MediaBench.The broader impacts of this research include potential for contributing technology that reduces energy consumption for current embedded computing applications, and may enable more advanced future embedded computing systems within energy, power, and thermal dissipation constraints. The project will integrate research with graduate education, both in the classroom and through direct participation of students in the research. It will include collaborations with researchers at IBM, Pacific Northwest Laboratories, and Intel.
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NSF Student Travel Grant for IEEE SmartCloud 2017
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批准号:1842624
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项目类别:Standard Grant
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资助金额:$0.82万
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财政年份:2018
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负责人:Meikang Qiu
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依托单位:
NSF Student Travel Grant for IEEE SmartCloud 2017
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批准号:1743644
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项目类别:Standard Grant
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资助金额:$1.5万
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财政年份:2017
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负责人:Meikang Qiu
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依托单位:
EAGER: Towards Low-Latency Low-Power Heterogeneous Memory Access
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批准号:1359557
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项目类别:Standard Grant
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资助金额:$7.61万
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财政年份:2013
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负责人:Meikang Qiu
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依托单位:
EAGER: Towards Low-Latency Low-Power Heterogeneous Memory Access
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批准号:1249223
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项目类别:Standard Grant
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资助金额:$10.0万
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财政年份:2012
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负责人:Meikang Qiu
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依托单位:
海外基金