SHF: Small: Layout Assessment and Optimization for Disruptive Patterning and Device Technologies

半导体技术的持续扩展对于保持降低成本、更多功能集成和提高性能的承诺至关重要-所有这些都在电子系统的相同或更小的能源足迹内。随着集成电路制造已经在其物理极限的边缘工作，半导体行业可能会在未来几年和几十年内看到制造和器件技术的一些根本性变化。 该提案的更广泛影响部分在于工件（软件、勘探成果数据等）这将使学术界和工业界能够评估和优化先进的半导体技术。除了加强研究生课程和从事研究的本科生，PI将共同组织的洛杉矶计算圈：一个夏季计划，以暴露高中生的非传统方面的计算。在制造方面，可以看到的两个根本性变化是（1）在光刻中使用极紫外（EUV）光，其具有比当前使用的波长小10倍以上的波长，并具有相关的分辨率改进（即，甚至进一步缩小晶体管和导线尺寸的可能性）;以及（2）采用定向自组装（DSA）：一种方案，其中期望的图案在某种指导下自组装到晶片上。电子技术的另一个突破可能来自垂直取向晶体管的发展（即，通过它们的电流在Z方向而不是X或Y方向上流动），其具有降低休眠功率、改善性能、更小面积和易于集成异质材料的前景。该项目的重点是使这些颠覆性的技术，将需要在设计基础设施和制造端的软件工具的实质性变化是可行的。将开发用于技术开发、设计布局生成和可制造性评估的算法和软件框架。

Continued scaling of semiconductor technology is essential to preserve the promise of reduced cost, more functional integration and improved performance - all within the same or smaller energy footprint for electronic systems. With integrated circuit fabrication already working at the edge of its physical limits, the semiconductor industry is likely to see several radical changes in the manufacturing and device technologies in the next few years and decades. The broader impact of this proposal lies partly in the artifacts (software, exploration outcome data, etc.) which would enable the academia and industry communities to assess and optimize advanced semiconductor technologies. In addition to enhancing graduate curriculum and engaging undergraduate students in research, the PI will co-organize the Los Angeles Computing Circle: a summer program to expose high school students to non-traditional aspects of computing. On the manufacturing front, the two radical changes that may be seen are (1) use of Extreme Ultraviolet (EUV) light in lithography which has over 10X smaller wavelength than what is used currently with associated improvement in resolution (i.e., potential to shrink transistor and wire dimensions even further); and (2) adoption of Directed Self Assembly (DSA): a scheme where desired patterns self-assemble onto the wafer with some guidance. The other disruption in electronics technology is likely to come from development of vertically oriented transistors (i.e., the current through them flow in z direction instead of x or y) which hold the promise of reduced sleep power, improved performance, smaller area and amenability to integrate heterogeneous materials. The focus of the project is to enable these disruptive technologies that will require substantial changes in design infrastructure and manufacturing-side software tools to be viable. Algorithms and software frameworks for technology development, design layout generation and manufacturability assessment will be developed.