SHF:SMALL: MECAR: Memory-Centric Architecture to Bridge the Gap Between Computing and Memory

传统的计算机系统通常遵循所谓的经典冯·诺依曼体系结构，由独立的处理单元(如CPU和GPU)进行计算，存储单元用于数据存储。处理器的计算和内存之间的差距越来越大，造成了内存墙问题，其中内存子系统正在成为整个计算系统的瓶颈。随着技术的扩展，处理单元(PU)和内存之间的数据移动正成为从云服务器到最终用户设备的各种计算机系统中最关键的性能和能量瓶颈之一。随着我们进入大数据时代，许多新兴的数据密集型工作负载变得无处不在，要求在计算单元和内存之间进行非常高的带宽和大量的数据移动。本项目的根本目标是以应用驱动的方式推动计算和内存之间的桥梁趋势。通过利用PI先前对3D堆叠内存和非易失性内存体系结构的广泛研究，PI建议专注于(1)设计以内存为中心的处理单元(PU)体系结构，其中大容量GB片上/封装内存与计算单元集成；(2)结合DRAM和新兴的NVM研究新的内存处理(PIM)存储体系结构设计；(3)以神经计算和图分析等新兴数据密集型应用为应用驱动，共同设计和优化以内存为中心的PU体系结构和NDC/PIM存储体系结构，从而指导体系结构的优化。这项研究还将提供设计指南，使未来的计算系统能够超越最先进的水平，范围从高性能亿级计算到低功耗移动系统。因此，它将增强当今从消费电子到企业电子产品的几乎每一种数字移动设备。它还可以催生涉及百亿级数据计算的新应用程序，如数据挖掘、机器学习、生物信息学等。预计该项目将成为催化剂，从体系结构和系统设计的角度，加速在未来的计算机系统和应用程序中采用数据密集型和以内存为中心的技术。PI与计划中的暑期实习具有广泛的行业联系，这对拓宽学生的知识和技能将是无价的。PI还将努力通过定期和在线课程教育广大受众了解新兴技术。出版物/讲稿将在公共网站上发布，以促进更广泛的科学知识传播。

Traditional computer systems usually follow the so-called classic Von Neumann architecture, with separated processing units (such as CPUs and GPUs) to do computing and memory units for data storage.  The increasing gap between the computing of processor and the memory has created the memory wall problem in which the memory subsystem is becoming the bottleneck of the entire computing system. As technology scales, data movement between the processing units (PUs) and the memory is becoming one of the most critical performance and energy bottlenecks in various computer systems, ranging from cloud servers to end-user devices. As we enter the era of big data, many emerging data-intensive workloads become pervasive and mandate very high bandwidth and heavy data movement between the computing units and the memory.  The fundamental goal of this project is to advance the trend of bridging the gap between computing and memory, with an application-driven approach. By leveraging the PI's prior extensive research on 3D-stacked memory and non-volatile memory architecture, the PI proposes to focus on (1) designing memory-centric processing unit (PU) architecture with massive GB on-chip/on-package memory integrated with computing units; (2) investigating new processing-in-memory(PIM) memory architecture designs with both DRAM and emerging NVM; (3) and co-design and co-optimization of both memory-centric PU architecture and NDC/PIM memory architecture, with the emerging data-intensive applications such as neural computing and graph analytics as application driver to guide the architecture optimization. The success of this research will have enormous economic and social benefits as broader impact. The research will provide the design guidelines for enabling future computing systems beyond the state-of-the-art, ranging from high performance exascale computing to low power mobile systems. Consequently, it will enhance nearly every digital device available today from consumer to enterprise electronics. It can also spawn new applications involving the computation on the exascale of data, e.g. data mining, machine learning, bio-informatics, etc. It is expected that this project will serve as a catalyst to accelerate the adoption of data-intensive and memory-centric technologies in future computer systems and applications from architecture and system design perspectives. The PI has extensive industrial ties with summer internships planned, which will be invaluable for broadening the knowledge and skills of the students. The PI will also strive to educate a broad audience on the emerging technologies through regular and online classes. Publication/lecture notes will be released on public websites to promote the broader dissemination of scientific knowledge.