CAREER: Advancing STTRAM Caches for Runtime Adaptable and Energy-Efficient Microarchitectures
CAREER: Advancing STTRAM Caches for Runtime Adaptable and Energy-Efficient Microarchitectures
批准号:
1844952
负责人:
Tosiron Adegbija
金额:
$50.0万
依托单位:
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2019
资助国家:
美国
项目状态:
未结题
起止时间:
2019-06-01 至 2025-05-31
中文摘要
片上高速缓存对包括台式计算机、嵌入式系统、移动设备、服务器等在内的各种计算机系统的能耗和性能具有重要影响。作为实现高速缓存的传统静态随机存取存储器(SRAM)的替代方案,自旋转移扭矩RAM(STTRAM)是一种非易失性存储器,具有高密度、低泄漏、高耐久性以及与互补金属氧化物半导体(CMOS)兼容等优点。然而,STTRAM缓存仍然面临着阻碍其广泛采用的关键挑战,例如高写入延迟和高能量。此外,计算机系统和在系统上运行的程序的用户通常具有不同的资源需求,需要能够动态适应运行需要的高速缓存。这个职业项目将调查几个相互关联的研究问题,包括:STTRAM的特征以及如何利用它们来提高运行不同程序的计算机系统的能效和性能;改善用户在运行程序时的体验的技术;启用节能且可以动态适应运行程序的STTRAM高速缓存的新的体系结构和管理技术?解决在复杂的多核计算机系统中实施STTRAM缓存的挑战的新方法。最终,该项目将开发能够自动适应不同程序执行需求的STTRAM缓存体系结构,从而产生更节能、更快的计算机系统。该项目的更广泛影响包括将提高各种计算机系统的性能和能效的体系结构和方法,以运行各种程序。随着物联网(IoT)的发展,跨越了不同的计算和用户需求,该项目代表着朝着适应性和低开销计算机系统迈出的重要和必要的一步。该职业项目还寻求通过K-12研讨会促进科学、技术、工程和数学(STEM)领域的教育和多样性,并通过吸引和装备一群不同的年轻工程师来为节能和适应性强的物联网架构设计创新的解决方案。该奖项反映了NSF的法定使命,并通过使用基金会的智力优势和更广泛的影响审查标准进行评估,被认为值得支持。
英文摘要
On-chip caches are important due to their substantial impact on the energy consumption and performance of a wide variety of computer systems, including desktop computers, embedded systems, mobile devices, servers, etc. As an alternative to traditional static random-access memory (SRAM) for implementing caches, the spin-transfer torque RAM (STTRAM) is a type of non-volatile memory that promises several advantages, such as high density, low leakage, high endurance, and compatibility with complementary metal-oxide-semiconductor (CMOS). However, STTRAM caches still face critical challenges that impede their widespread adoption, such as high write latency and energy. In addition, users of computer systems and the programs that run on the systems typically have variable resource requirements, necessitating caches that can dynamically adapt to runtime needs.This CAREER project will investigate several interrelated research problems, including: STTRAM's characteristics and how they can be leveraged for improving the energy efficiency and performance of computer systems that run diverse programs; techniques for improving the user's experience while running the programs; new architectures and management techniques for enabling STTRAM caches that are energy-efficient and can dynamically adapt to running programs? individual needs; and novel methods to address the challenges of implementing STTRAM caches in complex multicore computer systems. Ultimately, the project will develop STTRAM cache architectures that can automatically adapt to the execution needs of diverse programs, resulting in more energy-efficient and faster computer systems.The project's broader impacts include architectures and methods that will improve the performance and energy efficiency of a wide variety of computer systems for running a wide variety of programs. With the growth of the Internet of Things (IoT), spanning diverse computing and user needs, this project represents an important and necessary step towards adaptable and low-overhead computer systems. This CAREER project also seeks to foster education and diversity in science, technology, engineering, and math (STEM) fields through K-12 seminars, and by engaging and equipping a diverse group of young engineers with necessary techniques and skills to design innovative solutions for energy-efficient and adaptable Internet of Things architectures.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
期刊论文(9)
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DOI:
10.1109/mcsoc.2019.00044
发表时间:
2019-08
期刊:
2019 IEEE 13th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)
影响因子:
--
作者:
[Kyle Kuan;Tosiron Adegbija]
通讯作者:
Kyle Kuan;Tosiron Adegbija
DOI:
10.1016/j.future.2022.05.023
发表时间:
2022-06
期刊:
Future Gener. Comput. Syst.
影响因子:
--
作者:
[Dhruv Gajaria;Tosiron Adegbija]
通讯作者:
Dhruv Gajaria;Tosiron Adegbija
DOI:
10.1109/tcad.2020.3012169
发表时间:
2020-11-01
期刊:
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
影响因子:
2.9
作者:
[Cordeiro, Renato, Gajaria, Dhruv, Tehranipoor, Fatemeh]
通讯作者:
Tehranipoor, Fatemeh
A Study of STT-RAM-based In-Memory Computing Across the Memory Hierarchy
跨内存层次结构的基于 STT-RAM 的内存计算研究
DOI:
10.1109/iccd56317.2022.00105
发表时间:
2022
期刊:
2022 IEEE 40th International Conference on Computer Design (ICCD
影响因子:
--
作者:
[Gajaria, Dhruv, Antony Gomez, Kevin, Adegbija, Tosiron]
通讯作者:
Adegbija, Tosiron
A Study of STTRAM-based Page Walker Caches for Energy-Efficient Address Translation
基于STTRAM的Page Walker高速缓存的节能地址转换研究
DOI:
10.1109/isvlsi54635.2022.00026
发表时间:
2022
期刊:
2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI
影响因子:
--
作者:
[Kuan, Kyle, Adegbija, Tosiron]
通讯作者:
Adegbija, Tosiron
共 9 条
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