CAREER: Hardware-Software Co-Design to Dynamically Specialize the Memory Hierarchy

几十年来，计算能力的指数增长为研究、工业和社会带来了变革性的好处。随着Dennard扩展优势的消退，为了维持这种增长，计算机架构师必须设计出性能和能效都高出数量级的新系统。不幸的是，计算机系统越来越多地受到数据访问成本上升的限制，数据访问成本往往主导着进行实际计算所花费的时间和精力。这个项目将设计和评估一种新的计算机系统设计，通过为每个应用程序动态专门化存储器层次结构，使数据访问变得更快、更便宜。该项目将继续保持研究人员、行业和社会所依赖的计算能力的增长。它将特别加快机器学习、社交网络和机器人等重要应用的速度，这些应用的核心计算仍然超出了当前芯片设计的能力。这个项目将开发关于存储器层次结构和专业架构的新课程，并让高中生、本科生和研究生参与研究。它将通过面向本科生女性的研究研讨会和针对代表性不足的少数民族的暑期实习计划来提高多样性。目前的计算机系统产生了大量不必要的数据移动，因为它们的内存层次结构固定在硬件中，对软件隐藏，因此应用程序无法控制如何管理数据。该项目将开发一种新的软硬件联合设计，将数据作为一等公民与计算机结合在一起。应用程序将表达它们的性能目标(例如，吞吐量、服务质量和/或安全性)，并且在编译器的支持下，将它们的计算分解为具有相关数据的任务。操作系统(OS)和硬件将协同调度任务和数据，以便以最小的数据移动实现应用程序的目标。操作系统调度器将考虑到异构片上系统(SoC)中每个核/加速器的不同性能特征，并且硬件将在整个存储器层次结构中整合高能效的核，以实现近数据计算，同时最大限度地利用数据局部性。软硬件协同设计为减少数据移动的进一步研究提供了可扩展的平台，并通过使集成新加速器的成本更低来补充行业对异类SoC的投资。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

Decades of exponential growth in computing power have yielded transformative benefits for research, industry, and society. To sustain this growth as Dennard Scaling benefits fade, computer architects must design new systems with orders-of-magnitude better performance and energy-efficiency. Unfortunately, computer systems are increasingly limited by the rising cost of accessing data, which often dominates the time and energy spent doing actual computation. This project will design and evaluate a new computer system design that makes data accesses much faster and cheaper by dynamically specializing the memory hierarchy for each application. This project will continue the growth in computation power that researchers, industry, and society have come to rely upon. It will particularly accelerate important applications like machine learning, social networking, and robotics whose core computations remain beyond the capability of current chip designs. This project will develop new curricula on memory hierarchy and specialized architectures as well as involve high school, undergraduate, and graduate students in research. It will improve diversity through research workshops for undergraduate women and a summer internship program for under-represented minorities.Current computer systems incur significant unnecessary data movement because their memory hierarchy is fixed in hardware and hidden from software, so that applications have no control over how data are managed. This project will develop a new hardware-software co-design that incorporates data as a first-class citizen alongside compute. Applications will express their performance goals (e.g., throughput, quality of service, and/or security) and, with compiler support, break their computation into tasks with associated data. The operating system (OS) and hardware will collaboratively co-schedule tasks and data so that applications' goals are achieved with minimal data movement. The OS scheduler will account for the diverse performance characteristics of each core/accelerator in a heterogeneous system-on-chip (SoC), and hardware will incorporate energy-efficient cores throughout the memory hierarchy to enable near-data computation while maximally exploiting data locality. The hardware-software co-design gives an extensible platform for further research on reducing data movement, and it complements industry investment in heterogeneous SoCs by making it inexpensive to integrate new accelerators.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.