SHF: Medium: Enabling Real-Time Federated Learning at the Edge: Algorithm and Circuit Co-Design

机器学习应用正在渗透到许多新的领域，对隐私的日益关注正在将培训推向用户设备，而不是在云中的大型计算机上执行。在联合学习范式中，模型训练在具有用户私有本地数据集的大量分布式设备上执行，而聚合模型在云上组成。这种方法在新算法的开发和分析以及为有效操作而优化的硬件的共同设计方面提出了许多新的挑战。为了高效部署联合学习，边缘设备需要支持该计划感兴趣的许多其他方面，其中包括设备上学习和使用私有数据的增量模型更新，通常是实时执行的。该项目建议建立一个端到端的实时联合学习框架，范围包括算法创新、硬件-软件协同设计以及可扩展技术中的高效硬件演示。同时，拟议的教育活动将促进工程师和科学家的发展，他们的专业知识涵盖从算法到数字系统实现的广泛范围。实时机器联合学习的概念需要将理论算法方面与他们的实际开发相结合。理论方面包括压缩模型大小、减少通信需求和评估性能。实用方面包括用于训练和推理的高效硬件、使用近记忆计算的随机草图绘制以及硬件感知神经网络设计。具体而言，它的目标是：(1)充分展示适合于各种场景部署的可扩展和高能效的实时联邦学习架构；(2)通过测试芯片和基于云的FPGA仿真进行实验测量，以验证所开发的系统模型；(3)将平台发布到开源平台。这项工作的主要产品整合了研究和教育，包括可扩展的随机草图算法，用于设备培训的高能效和高成本的机器学习加速器，以及用于硬件感知算法设计的快速准确的硬件建模基础设施。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

Machine-learning applications are penetrating many new domains, and the increased concern for privacy is pushing training to the user devices, as opposed to being performed on large computers in the cloud. In the federated-learning paradigm, model training is performed on a large number of distributed devices with a user’s private local datasets, while the aggregate model is composed on the cloud. This approach poses a number of new challenges in both development and analysis of new algorithms and co-design of optimized hardware for efficient operation. For efficient deployment of federated learning, edge devices need to support many other aspects of interest for this program, among them on-device learning and incremental model updates with private data, often performed in real time. This project proposes to build an end-to-end, real-time federated-learning framework, ranging from algorithmic innovations, hardware-software co-design, and efficient hardware demonstrations in scaled technologies. Concurrently, the proposed education activities will enable the development of engineers and scientists whose expertise spans a broad range from algorithms to digital system implementation.The real-time machine federated-learning concept requires integration of theoretical algorithm aspects with their practical development. Theoretical aspects include the compression of model size, reduction in communication requirements and the assessment of performance. Practical aspects include efficient hardware for training and inference, randomized sketching with near-memory computation and hardware-aware neural network design. In particular, it aims to achieve: (1) A full demonstration of a scalable and energy-efficient real-time federated learning architecture suitable for deployment in various scenarios, (2) Experimental measurements via test chips and cloud-based FPGA simulation to validate the developed system models, (3) Release of the platform in the open source. The key products of this work integrate research and education and encompass scalable randomized sketching algorithms, energy- and cost-efficient machine-learning accelerators for on-device training, and fast-and-accurate hardware-modeling infrastructure for hardware-aware algorithm design.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.