CNS Core: Small: Autogenerating fast packet-processing code using program synthesis

计算机网络是当今数字社会的基础部分。这些网络的一个关键组成部分是基站、接入点和路由器的基础设施，它们将计算机粘合在一起，并将网络流量（分解为“数据包”）从一个地方移动到另一个地方。 随着时间的推移，除了数据包转发之外，网络基础设施还承担了许多额外的要求，以使其更加高效和强大，例如攻击检测和预防，访问控制，负载平衡，数据包调度和测量。为了实现这些要求，出现了“可编程”的新网络设备。 该提议提出开发新颖的编译器技术以实现快速、高效的网络可编程性。可编程网络设备（例如，交换机、智能交换机和FPGA）现在正迅速成为主流。虽然开始对这些设备进行编程很容易，但仍然很难编写适合每个设备资源约束的快速数据包处理代码。如今，编写如此快速的数据包处理代码主要是由对底层硬件有深入了解的专家福尔斯完成的。虽然编译器应该减轻生成高性能代码的负担，但这些设备的编译器仍然是初步的，开发良好的编译器需要大量的工程工作和时间。作为回应，该提案建议使用程序合成技术来构建编译器，生成用于数据包处理的高质量机器代码。该提案有三个关键要点：（i）用于可编程网络的代码生成-开发代码生成器，该代码生成器从高级语言（例如，P4或C），用于各种不同的数据包处理基板，如可编程交换机、FPGA和x86处理器。(ii)加速用于代码生成的程序合成：将程序合成算法专门化到代码生成的用例，并在此过程中加速合成算法，以便使用程序合成生成代码不会比使用基于规则的编译器技术生成代码慢得多。(iii)推进基于合成的代码生成的界限：探索高级程序和生成的机器代码之间的等价性的宽松概念，从而可以以相对于原始程序的一些准确性损失为代价生成更高性能的机器代码。该奖项反映了NSF的法定使命，并通过使用基金会的智力价值和更广泛的影响审查标准进行评估，被认为值得支持。

Computer networks are a foundational part of today’s digital society. A critical component of these networks is the infrastructure of base stations, access points, and routers that glues computers together, and moves network traffic (broken up into ‘packets’) from place to place. Over time, in addition to packet forwarding, the network infrastructure has taken on many additional requirements to make it more efficient and robust, such as attack detection and prevention, access control, load balancing, packet scheduling, and measurement. To implement these requirements, new network devices have emerged that are ‘programmable’. This proposal proposes to develop novel compiler technology to enable fast, efficient network programmability.Programmable network devices (e.g., switches, SmartNICs, and FPGAs) are now rapidly becoming mainstream. While it is easy to get started with programming these devices, it is still hard to write fast packet-processing code that fits within the resource constraints of each device. Writing such fast packet-processing code today largely falls to experts with deep knowledge of the underlying hardware. While compilers should alleviate the burden of generating high-performance code, the compilers for these devices are still preliminary, and developing good compilers takes significant engineering effort and time. In response, the proposal proposes the use of program synthesis technology to build compilers that generate high-quality machine code for packet processing. This proposal has three key thrusts: (i) Code generation for programmable networks-developing code generators that generate high-quality machine code from a higher-level language (e.g., P4 or C) for a variety of different packet-processing substrates like programmable switches, FPGAs, and x86 processors. (ii) Speeding up program synthesis for code generation: Specializing program synthesis algorithms to the use case of code generation and speeding up synthesis algorithms in the process, so that code generation using program synthesis isn’t significantly slower than code generation using rule-based compiler techniques. (iii) Pushing the boundaries of synthesis-based code generation: Exploring relaxed notions of equivalence between higher-level programs and generated machine code so that higher-performance machine code can be generated at the cost of some loss of accuracy relative to the original program.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.