SaTC: TTP: Medium: I-C-U: AI-Enabled Recovery and Assurance of Semiconductor IP from SEM Images

集成电路（IC）制造的全球化已经导致不可信的代工厂有机会故意安装后门，即，硬件木马，进入网络系统，供对手随意利用。逆向工程（RE）是防御者手中唯一有可能保证信任的方法。然而，现有的RE工作流是ad-hoc的、不可扩展的、容易出错的，并且需要人工干预。在这个项目中，I-C-U包括通过开发关键算法基础设施和真实世界数据来帮助解决这些问题的技术，以促进IC RE工作流程的自动化。I-C-U还引入了防止通过滥用可再生能源盗窃知识产权的措施，并通过更有效地验证其IC设计的真实性来进一步增强防御者的能力。最后，I-C-U还专注于通过教育计划传播这些知识，并将关键的可再生能源辅助硬件保证技术转移给行业。这些关键的发展使得能够利用具有竞争力的全球供应链，同时实现所制造的IC的安全性和信任。被称为I-C-U的工具套件通过以下方式将工作流程形式化来系统地解决RE的限制：（1）RE工作流程的自动化，包括容错扫描电子显微镜（SEM）图像采集、分割和门级网表生成;（2）创建资源以支持数据/AI驱动的设计恢复方法的开发，通过从真实世界数据生成合成图像，捕获IC样品制备、去处理和SEM成像引入的噪声的模型，以及使用隐私保护变换;（3）开发风险分析指标，用于评估设计恢复，并在物理设计过程中使用它们部署对策，以抑制攻击者执行RE和/或或提高防御者检测IP侵权和硬件木马的能力。这些目标，当汇总时，满足的主要目标是在IC RE工作流程中推进自动化，同时保护关键的半导体IP.这个奖项反映了NSF的法定使命，并已被认为是值得通过使用基金会的智力价值和更广泛的影响审查标准进行评估的支持.

Globalization of integrated circuit (IC) fabrication has resulted in opportunities for untrusted foundries to deliberately install backdoors, i.e., hardware Trojans, into cyber systems for an adversary to exploit at will. Reverse Engineering (RE) is the only approach in the hands of defenders that has the potential to guarantee trust. However, the existing RE workflow is ad-hoc, unscalable, error-prone, and requires manual intervention. In this project, I-C-U consists of technologies that assist in resolving these issues by developing critical algorithmic infrastructure and real-world data to advance automation in IC RE workflow. I-C-U also introduces measures to prevent the theft of intellectual property (IP) through misuse of RE and further enhances the capabilities of defenders by verifying the authenticity of their IC's design more efficiently. Finally, I-C-U also focuses on disseminating this knowledge through educational programs and transferring key RE-assisted hardware assurance technologies to the industry. These key developments enable the utilization of a competitive global supply chain while simultaneously enabling security and trust in the manufactured IC.The tool suite, called I-C-U, systematically address the limitation of RE by formalizing the workflow through (1) Automation of the RE workflow including fault-tolerant Scanning Electron Microscopy (SEM) image acquisition, segmentation, and gate-level netlist generation; (2) Creation of resources to support the development of data/AI-driven design recovery approaches via generation of synthetic images from real-world data, models that capture the noise introduced by IC sample preparation, de-processing, and SEM imaging, and use of privacy-preserving transforms; (3) Development of risk analysis metrics for evaluating design recovery and using them to deploy countermeasures during the physical design process that inhibit the attacker's ability to perform RE and/or promote a defender's ability to detect IP infringement and hardware Trojans. These objectives, when aggregated, satisfy the primary goal of advancing automation in IC RE workflows while protecting critical semiconductor IP.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.