SHF: SMALL: End-to-End Global Routing with Reinforcement Learning in VLSI Systems

集成电路已经通过广泛的计算设备改变了现代生活的各个领域-从个人计算机到专用加速器和高性能计算集群。随着现代集成系统的设计复杂性越来越高，传统的电子设计自动化算法无法保证设计过程的收敛，无法预测输出质量，并且往往满足于较低的性能。考虑到在新技术节点中开发系统所花费的数十亿美元，由于没有及时准备好系统以发布到市场或失去新技术节点的性能优势而造成的利润损失无法减轻。本项目研究了一种全新的电路全局布线方法-一个关键的自动化设计步骤和设计过程中的主要瓶颈。主要目标是以高度并行化的方式使用深度学习模型布线电路，将周转设计时间缩短几个数量级。更广泛地说，该项目的结果有望将现有的物理设计范式转变为学习驱动的可预测过程，从而及时充分利用底层技术的优势。该奖项由联邦指定的西班牙裔服务机构执行，为与不同的少数民族人口接触提供了独特的机会，并为电路设计，电子设计自动化和机器学习创造了培训机会。因此，该项目预计将产生强大的经济和社会影响。通过一堆棘手的优化来解决全局路由的NP-难题，传统路由器的特点是收敛问题和不可预测的路由质量。虽然人们普遍认为使用机器学习（ML）模型实现布线的潜在好处，但还没有一个端到端的学习框架被证明可以路由看不见的高分辨率实际集成电路。为了解决这一挑战，全局布线将被视为ML问题，其中网络被视为布线解决方案的缺失部分，并以优先顺序重建，与成像ML模型，同时考虑整体最小线长目标和拥塞约束。本研究的见解将被利用来开发一个并行学习框架，包括：（i）用于编码路由属性的图形神经网络，（ii）用于确定下一个要路由的网络的网络排序策略，以及（iii）用于路由单个未见过网络的变分自动编码器。最终的设计方法和机器学习模型、架构和算法将被集成到端到端机器学习路由器中，并在现有的基准测试和工业合作者提供的商业产品上进行演示。该奖项反映了NSF的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

Integrated circuits have transformed every sector of modern life with a broad range of computing devices – from personal computers to specialized accelerators and high-performance computing clusters. With the ever-high design complexity of modern integrated systems, traditional electronic design-automation algorithms cannot guarantee convergence of the design process, fail to predict output quality, and often settle for lower performance. Considering billions of dollars spent on developing a system in a new technology node, the loss of profit due to not having the system ready on time for release to market or losing the performance benefits of the new technology node cannot be mitigated. This project investigates a fundamentally new approach for circuit global routing -- a critical automated design step and a primary bottleneck in the design process. The primary objective is to route circuits with deep-learning models in a highly parallelizable manner, shortening the turnaround design time by orders of magnitude. More broadly, the results from this project are expected to shift existing physical-design paradigms toward a learning-driven predictable process that can exploit the advantages of the underlying technology to their full potential in a timely manner. Executed by a federally designated Hispanic Serving Institution, this award presents a unique opportunity to engage with a diverse minority population and creates training opportunities in circuit design, electronic design automation, and machine learning. As such, the project is anticipated to have a strong economic and societal impact.Designed via a pile of intractable optimizations to tackle the NP-hard problem of global routing, traditional routers are characterized by convergence issues and unpredictable routing quality. While there is a general agreement on potential benefits of realizing routing with machine-learning (ML) models, not a single end-to-end learning framework has been demonstrated to route unseen high-resolution practical integrated circuits.To address this challenge, global routing will be investigated as an ML problem in which nets are viewed as the missing parts of a routing solution and reconstructed, in a preferred order, with imaging ML models while considering the overall minimum wirelength objective and congestion constraints. The insights from this study will be exploited to develop a reinforcement-learning framework comprising: (i) graph neural network for encoding routing attributes, (ii) net ordering policy for determining the next net to be routed, and (iii) variational autoencoder to route individual unseen nets. The resulting design methodology and ML models, architectures, and algorithms will be integrated in an end-to-end ML router and demonstrated on existing benchmarks and commercial products provided by industrial collaborators.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.