EAGER: High temperature superconducting thin film-based inductors and transformers for on-chip power management of 77K CMOS

对于常规电子设备以及超导电子设备而言，在低温下操作微电子设备的趋势越来越大。在77 K液氮温度下，CMOS器件可以以更高的速度运行，量子计算等现象可以用于更多样化的应用。基于铜酸盐的高温超导（HTS）材料通常生长在二氧化铈衬底上。这些薄膜具有高的临界电流，使它们在低于~ 80 K的温度下非常有用。 不幸的是，它们不能在硅衬底上生长，因为它们的生长温度对于CMOS芯片来说太高。 该项目旨在将钇钡和氧化铜（YBCO）可用的高温超导材料图案化为细线和磁性元件，并通过热压键合将其转移到硅衬底上，然后将其与其原生衬底分离，最终用于77 K CMOS电子产品。目标是设计用于功率传输的磁性元件，如片上变压器、电感器和谐振线圈，以几乎零损耗和极低能量传导电信号。该项目将证明将高温超导材料制成可应用于硅芯片的可用导线的可行性。该项目将教育学生和社会对低温电子高温超导材料的处理和实施。 高温超导体（HTS）在低温电子学中具有潜在的用途，特别是用于互连、磁性部件（如线圈、变压器和谐振器）。electronics.该项目建议解决两个主要挑战，将HTS薄膜图案化成微米尺寸的导线;并将这些图案转移到硅衬底上，用于制造电感器，线圈和变压器。 在蓝宝石衬底上用异质外延二氧化铈（Ce 2 O3）层生长的HTS膜将使用RIE方法进行图案化，因为该工艺被广泛用于可扩展性。薄膜将通过激光剥离或基于氢注入的剥离与其原生衬底分离，并将热压键合（TCB）到硅衬底上。转移的图案化膜将表征超导、电和结构性质的退化。光滑技术将被开发，以解决本质上粗糙的高温超导表面。 磁线圈和组件制造将在77 K的优点和效率的数字，并将与传统的铜互连的电气特性。该项目的成功完成将为将高温超导导线互连技术转化为硅芯片奠定基础，并广泛应用于低温电子领域。该奖项反映了NSF的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

There is an increasing trend to operate microelectronics at low temperatures for both conventional electronics as well as superconducting electronics. At 77K liquid nitrogen temperatures, CMOS devices can operate at much higher speeds, and phenomena such as quantum computing can be exploited for more diverse applications. Cuprate based high temperature superconducting (HTS) materials are typically grown on ceria substrates. These films have high critical currents that make them quite useful at temperatures below ~80K. Unfortunately, they cannot be grown on silicon substrates since their temperatures of growth are too high for CMOS chips. This project aims to pattern Yttrium Barium and Copper Oxide (YBCO) available HTS materials into fine wires and magnetic components and transfer them via thermal compression bonding to silicon substrates and then separating them from their native substrates for eventual use in 77K CMOS based electronics. The objective is to design magnetic components such as on-chip transformers, inductors, and resonant coils for power delivery to conduct electrical signals with almost zero loss and very low energy. The project will prove the feasibility to pattern HTS materials into usable wires that can be applied to silicon chips. The project will educate students and the community on the processing and implementation of HTS materials for low temperature electronics. High temperature superconductors (HTS) have potential use in low temperature electronics especially for interconnects, magnetic components such as coils, transformers, and resonators. electronics. The project proposes to address two main challenges of patterning the HTS films into wires of micrometer dimensions; and to transfer these patterns to a silicon substrate for fabrication of inductors, coils, and transformers. HTS films grown with hetero-epitaxially ceria (Ce2O3) layers on sapphire substates will be patterned using RIE methods, since the process is widely used for scalability. Films will be separated from their native substrates either by laser-lift off or hydrogen implant-based exfoliation and will be thermal compression bonded (TCB) to the silicon substrate. The transferred patterned films will be characterized for degradation of superconducting, electrical, and structural properties. Smoothening techniques will be developed to address the intrinsically rough HTS surfaces. Magnetic coils and components fabricated will be electrically characterized at 77K for figures of merit and efficiency and will be compared with conventional copper interconnects. Successful completion will lay the foundation for a process to transfer of HTS wires-based interconnects to silicon chips, with extensive application in low temperature electronics.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.