CAREER: SHF: Rethinking the Control Plane for Chiplet-Based Heterogeneous Systems

从智能手机到超级计算机的现代单片计算系统包含传统cpu和各种专用加速器的异构组合，每种加速器都经过调优，以高效运行特定的应用程序子集。可悲的是，底层技术正在发生变化，使得持续扩展变得困难。因此，最近的工作已经研究了将多个较小的芯片（小芯片）组合成一个更大的聚合系统。基于芯片的异构系统避免了现代大型单片异构系统的挑战，实现了持续的性能和能量扩展，并允许比以前更紧密的组件集成。不幸的是，小程序也带来了新的挑战：如何跨计算资源调度计算以及如何协调资源之间的数据移动。现代单片异构系统中的控制平面利用一个集中的嵌入式可编程核心，即命令处理器（CP）来执行这些任务。然而，基于芯片的异构系统引入了额外的层次结构，导致与集中式CP冲突的间接和不均匀性。该项目将通过创建分布式、全功能、可编程、程序员透明的控制平面来解决这些问题并推进科学，这将显著提高未来基于芯片的异构系统的效率。此外，该项目将开辟新的研究领域，使芯片设计师能够有效地设计和集成未来基于芯片的异构系统。为了扩大社区并减少进入门槛，该项目将(1)发布开发的软件工件、硬件设计和接口，(2)与行业合作者合作影响后续产品，(3)开发新课程，教下一代学生如何使用和加速基于芯片的异构系统，以及(4)与麦迪逊代表性不足的社区合作，帮助提高他们对STEM的参与。为了实现这些机会，该项目将集中式CP划分为本地的、每芯片的CP，这些CP与全局CP一起协调加速器之间的通信和计算。局部CPs提供关于每个芯片内当前行为的动态微秒级信息，而全局CP通过综合来自局部CPs的信息，具有跨芯片的全局视图。考虑到这种分区设计，该项目的关键任务包括通过识别和利用全局CP中的算法并行性来提高加速器的利用率，创建新的本地和全局CP调度器，透明有效地在小芯片之间划分工作，以满足实时截止日期，并保留数据的局域性和放置优势，以及设计一个创新的一致性协议，监测和跟踪本地和全局CP中的依赖信息。并且仅在必要时执行昂贵的芯片间隐式同步操作。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

Modern monolithic computing systems ranging from smartphones to supercomputers contain a heterogeneous mix of conventional CPUs and a variety of specialized accelerators each tuned to run specific subsets of applications at high efficiency. Sadly, the underlying technology is changing, making continued scaling difficult. Thus, recent work has examined combining multiple smaller chips (chiplets) into a larger, aggregated system. Chiplet-based heterogeneous systems avoid the challenges of modern, large monolithic heterogeneous systems, enable continued performance and energy scaling, and allow closer integration of components than was previously possible. Unfortunately, chiplets also introduce new challenges: how to schedule computation across the computational resources and how to coordinate data movement between resources. The control plane in modern, monolithic heterogeneous systems utilizes a centralized embedded, programmable core, a command processor (CP), to perform these tasks. However, chiplet-based heterogeneous systems introduce an additional layer of hierarchy, causing indirection and non-uniformity that clash with the centralized CP. This project will fix these problems and advance science by creating a distributed, fully featured, programmable, programmer-transparent control plane that will significantly improve the efficiency of future chiplet-based heterogeneous systems. Moreover, this project will open new areas of research and enable chip designers to efficiently design and integrate future chiplet-based heterogeneous systems. To broaden the community and reduce barriers to entry the project will (1) release the developed software artifacts, hardware designs, and interfaces, (2) work with industry collaborators to influence subsequent products, (3) develop new courses to teach the next generation of students how to use and accelerate chiplet-based heterogeneous systems, and (4) work with underrepresented communities in Madison to help increase their STEM participation.To realize these opportunities, this project partitions the centralized CP into local, per-chiplet CPs which, in concert with a global CP, coordinate communication and computation across accelerators. The local CPs provide dynamic, microsecond-scale information about the current behavior within each chiplet, while global CP possess a global view across chiplets by synthesizing information from the local CPs. Given this partitioned design, the project’s key tasks include improving accelerator utilization by identifying and harnessing algorithmic parallelism in the global CP, creating novel local and global CP schedulers that transparently and efficiently divide work across chiplets to meet real-time deadlines and retain data locality and placement benefits, and designing an innovative coherence protocol that monitors and tracks dependence information in the local and global CPs, and performs expensive inter-chiplet implicit synchronization operations only when necessary.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.