SBIR Phase II: Low-Cost Packaging Solution for Space-Grade and High-Reliability Integrated Circuits

这个小型企业创新研究（SBIR）第二阶段项目使集成电路在空间应用中使用现代封装技术成为可能。虽然卫星故障很常见，而且由于此类故障而导致的高额保险索赔也很频繁，但航天工业继续使用的集成电路要么不可靠（非空间级）且容易发生故障，要么空间级集成电路具有大型和昂贵的封装且性能受损。这一创新为集成电路封装提供了一种具有成本效益和尺寸更小的解决方案，可以在空间应用中经历的极端温度循环中可靠地运行。与传统的含铅封装解决方案相比，晶圆级芯片规模封装（WLCSP）更轻、更小，并且具有优越的电气和热性能。这些特性使其在不影响性能的情况下减小尺寸和重量，从而成为航天工业的理想选择。由于这种封装技术在温度循环下的性能有限，因此该项目试图通过使用现有的制造技术和新颖的设计概念来解决这种可靠性问题。这项小企业创新研究（SBIR）第二阶段项目旨在重新设计现有晶圆级芯片规模封装（WLCSP）中的特定层，以提高温度循环下的可靠性。WLCSP的温度循环可靠性问题是由硅芯片和铜电路板的热膨胀率不匹配引起的。该项目将重新设计WLCSP内的再分配层，通过根据更快移动的印刷电路板（PCB）有效地移动硅芯片上的互连来补偿这种不匹配。这个项目将使整个空间界都能享受到世界空间空间合作计划的好处。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

This Small Business Innovation Research (SBIR) Phase II project enables the use of modern packaging technologies for integrated circuits in space applications. While failures in satellites are common and high insurance claims due to such failures are frequent, the space industry continues to use integrated circuits (ICs) that are either unreliable (non-space-grade) and are prone to failure, or space-grade ICs with large and costly packaging and compromised performance. This innovation offers a cost-effective and reduced-size solution for the packaging of ICs that can operate reliably over the extreme temperature cycles experienced in space applications. Wafer Level Chip Scale Packaging (WLCSP) is lighter, smaller, and has superior electrical and thermal performance when compared to traditional leaded packaging solutions. These attributes make it desirable to the space industry by reducing size and weight, while not compromising performance. As this packaging technology is limited due to its performance under temperature cycling, this project seeks to address this reliability problem by using existing manufacturing techniques coupled with a novel design concept. This Small Business Innovation Research (SBIR) Phase II project aims to redesign specific layers within the existing Wafer Level Chip Scale Packaging (WLCSP) to improve reliability under temperature cycling. The temperature cycle reliability problem in the WLCSP is caused by a thermal expansion rate mismatch of silicon die and the copper circuit board. This project will redesign the redistribution layer within the WLCSP to compensate for this mismatch by effectively moving the interconnects on the silicon die in accordance with the faster moving printed circuit board (PCB). This project will make the benefits of WLCSP accessible for the entire space community.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.