A Research on a Virtual Model-Architecture for Massively Parallel Computer Systems

对于大规模并行处理器的设计者来说，很难通过反复试验的方式进行制造，也很难重复访问自己设计的体系结构。因此，它正在寻找一个环境，以帮助设计和评估的硬件/软件的权衡。而且，虽然需要的实验环境，从算法到系统编程和硬件体系结构的一致性教育，少数机构可以提供一个大规模并行处理系统。在本研究中，我们提供了一个虚拟的大规模并行处理环境，旨在有效地用于教育和研究。我们总结了这种环境的要求，并强调了它对各种问题的适应性。我们提出了一个虚拟的模型架构，包括集群的多个总线为基础的分布式共享内存体系结构。我们还讨论了实现的虚拟大规模并行处理器架构，这是这个环境的核心。最后，我们提出了一个实验性的并行编程系统。

On the side of the architects of massively parallel processors, it is difficult to manufacture by way of tried experiment and to access their own designing architectures repeatedly. Therefore, it is looked for an environment aiding to design and assess the hardware / software tradeoff.And, though required the experimental environment for the consistent education from algorithm to system programming and hardware architecture, a few institution can provide a massively parallel processing system.In this research, we have provided a virtual massively parallel processing environment aiming at effective use for education and research. We have summarized requirements for this environment, and emphasized its adaptability to various problems. We have suggested a virtual model-architecture, consisting of clusters of multiple bus-based distributed shared memory architecture. We have also discussed implementation of the virtual massively parallel processor architecture which is the kernel of this environment. Finally, we have presented an experimental parallel programming system.