Design of a Messageflow Processor with Chip-based Inter-processors Communication Function

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"Active Messages (AM) " has been proposed as an efficient message passing communication scheme for distributed memory parallel computers. AM is one of the best message passing communication schemes, and therefore AM has been implemented on several parallel computers to achieve the dramatic performance improvements. The novel feature of AM is that, in an inter-processor communication message, it is specified how the receiving processor should handle the message.In this research, we present a new communication scheme which improves AM in both the performance and availability. We call our scheme "Active Threaded Message (AT-Message) ". AT-Message is implemented by using two threads, which are independent control flows executed on each processor. One thread is for calculation, and the other for handling of received messages. These two threads are executed in parallel to achieve the low overhead communication. Furthermore, on designing AT-Message, we had investigated the optimal trade-off point between the software (such as a user program and an OS) and the hardware (such as a processor and a network controller), and we could succeed to realize both of safety and high-performance in the user-level communication of AT-Message. By employing AT-Message, we can construct an higher-performance and more easily-programmable massively parallel computer than the case employing original AM.In this research, we also present a detailed design of the elementary processor architecture implementing AT-Message efficiently.