Fabrication of SiC FETs on Sapphire Substrate for High Power and High Temperature Operation.

为在蓝宝石衬底上制备大功率高温SiC FET奠定了基础技术。在研究过程中还发现，硼薄膜作为高温热电材料具有优异的性能，为了制备高温、高功率FET，获得低界面态密度的栅绝缘膜和高质量的外延半导体膜是很重要的。蓝宝石是一种优良的大直径SiC外延生长衬底，但由于晶格常数的差异，可能会阻碍高质量层的生长。在这项工作中，硅上蓝宝石（SOS）晶片被用作SiC生长的衬底。表面碳化是提高SiC薄膜质量的有效方法。通过使用蓝宝石作为衬底，预期到衬底的漏电流减少。采用热灯丝辅助的方法可以有效地提高薄膜的质量，源、漏电极必须具有低的接触电阻和高的熔点。研究了金属/SiC接触的电学性能。用传输线模型（TLM）方法测量和讨论了MIS和MS结构作为SiC FET栅极的接触电阻率，结果表明，界面特性主要受SiC表面状态的控制，对金属功函数的影响不大。MOS结构是以TEOS为源材料，CVD淀积SiO_2层而制成的。沉积后退火是有效的，以减少界面态密度。这种方法可以消除在SiC衬底上热生长SiO_2过程中产生的CO_2对界面特性的影响。

Fundamental technologies have been established for fabrication of SiC FETs on sapphire substrate for high power and high temperature operation. During this research, it was also found that the boron films have excellent properties for a thermoelectric material used at high temperature.In order to fabricate a high temperature, high power FET, it is important to obtain a gate insulating film with low interface state density and a high quality epitaxial semiconducting film. The sapphire is one of the excellent large diameter substrate for SiC epitaxial growth, but the difference of lattice constant may prevent the growth of high quality layer. In this work, Silicon-on-Sapphire (SOS) wafers were used as the substrates for SiC growth. The surface carbonization was effective to improve the quality of the SiC film. The leakage current to the substrate was expected to be reduced by using the sapphire as a substrate. A hot filament assisted method was effective to improve the quality of the film.The source and drain electrode must have low contact resistance, together with high melting point. The electrical properties of metal/SiC contacts were investigated. The specific contact resistance was measured and discussed by transmission line model (TLM) method.Both the MIS and MS structures were examined as the gate of SiC FET.The interface properties were controlled mainly by the surface condition of SiC and not so sensitive to the metal work function. MOS structure was fabricated with CVD deposited SiO_2 layer by using TEOS as a source material. Post deposition annealing was effective to reduce the interface state dendity. This method make it possible to eliminate the CO_2 formation, which resulted in poor interface characteristics in thermally grown SiO_2 on SiC sutructre.