Quantum Mechanical Simulation of Ultra Thin SOIMOSFETs

我们提出了一种全反型SOI(Silicon-on-Jnsulator)MOSFET，其顶层硅厚度与反型层的厚度一样薄，厚度为k-3 nm。由于该器件的顶层硅层的厚度为1~3 nm，因此该层中的电子处于量子力学的二维态。在量子力学模型中，电子密度在硅层中间具有最大值，因此跨导预计会比经典模型预测的要低。硅层中的电子密度分布由量子力学的自洽势分布决定，电子在漏极偏压下的散射产生具有耗散性质的输运现象。为了了解强反转和饱和条件下的阈值电压、亚阈值特性和漏电流等电学特性，必须进行量子力学建模。2002年，我们在基于一维薛定谔-泊松自洽解横向积分的模拟器中加入了依赖于场的迁移率，从而提高了模拟精度。2003年，我们用我们的模拟器分析了厚度在2.5~500 nm范围内的薄硅层全反型SOIMOSFET的阈值电压。结果表明，量子力学阈值电压漂移可以用导带底部2D电子的基态能量和由量子力学电子分布产生的有效栅氧化层厚度漂移来解释。

We proposed a fully inverted SOI(Silicon-On-Jnsulator)MOSFETs which have as thin silicon top layer as inversion layer of k-3 nm. Since the thickness of the top silicon layers for this devices is 1〜3 nm, electrons in the layer are in quantum mechanical 2-D states. In the quantum mechanical modeling electron density has maximum in the midst of the silicon layer and thus the transconductance is expected to be lower than that predicted from classical modeling. The electron density distribution in the silicon layer is determined from quantum mechanical self-consistent potential distribution and the electrons produces transport phenomena with dissipative nature due to scattering under the drain voltage biasing. In order to know electrical characteristics such as threshold voltage, subthreshold characteristics and drain current under strong inversion and saturation conditions, quantum mechanical modeling is mandatory.In 2002, we improved simulation accuracy by including a field dependent mobility into our simulator which is based on lateral integration of 1D Schroedinger Poisson self-consistent solutions. In 2003, we analyzed threshold voltages of fully inverted SOIMOSFETs with thin silicon layer whose thickness is in a range of 2.5〜500 nm using our simulator. It is shown that the quantum mechanical threshold voltage shift can be explained by the ground state energy of 2D electrons shfted from the bottom of conduction band and the effective gate, oxide thickness shift produced by the quantum mechanical electron distribution.