Design of high reliability digital circuits having tolerance abilityfor noise and process variation

随着电源电压的降低、运行速度的加快和VLSI设计尺寸的缩小，由噪声引起的VLSI故障正成为一个严重的问题。在这项研究中，我们开发了对数据信号线上的噪声具有容忍性的触发器。由于所提出的触发器不需要任何附加信号，并且是与现有电路兼容的电路结构，因此可以与传统设计的电路混合。此外，还表明所开发的电路功能可以扩展到数据信号延迟时间的增减检测，并且可以应用于信号延迟的校正。

According to reduction of a supply voltage, speed-up of an operation speed and scale-down of devise dimensions of VLSIs, malfunction of VLSIscaused by noise is becoming a serious problem. In this study, we developed flip-flopswhich have tolerance for noise induced on a data signal line. As the proposed flip-flops do not require any additional signal and are compatible circuit structureswith existing circuits, it is possible to mix with circuits of conventional design. Furthermore, it was shown that the developed circuit function can be extended to detection of increase and decrease in the delay time of a data signal, and it can apply to correction of signal delay.