Organic architectures for self-organising smart pixel sensor chips

该项目的目标是追求两个方向。首先，我们希望扩展我们在OC芯片架构和受控紧急计算设计工具方面的概念性工作。第二，同时，我们的两个OC概念已经足够成熟，可以在实际应用中进行演示。基于我们的OC概念的行进像素(MP)的涌现算法的优越性被证明用于特定应用的设计。现在，这些好处将在通用体系结构中实现。为此，我们开发了一种为紧急计算量身定做的可编程并行体系结构，并将通过ASIC或FPGA的实现进行实验验证。MP算法应在该体系结构上实现，出于比较的目的，还应在GPGPU多核体系结构上实现，以确定紧急计算的优势是否也可以在这种并行体系结构上得到发挥。此外，MP方法将被扩展以配置未来的纳米体系结构。对于MP行为的自动设计，我们提出了一种基于元胞自动机(CA)进化和遗传规划的设计框架。为了提高框架的进化紧急计算方案的质量，我们将引入多重进化和消除冗余CA的概念。为化学组织理论提供了设计任意紧急控制系统工具的一般方法。我们提出的紧急硬连线路径规划算法的有效性将在移动机器人OSCAR中得到验证。最后，我们的芯片架构将通过使用ASOC方法来利用自优化功能。

The goal of the project pursues two directions. First, we want to expand our conceptual work on OC chip architectures and on a tool for the design of controlled emergent computing. Second, meanwhile two of our OC concepts are mature enough to demonstrate them in real applications. The superiority of emergent algorithms based on our OC concept of Marching Pixels (MP) was proven for application-specific designs. Now, these benefits shall be achieved in generic architectures. For that, we developed a programmable parallel architecture tailored for emergent computing, which shall be experimentally verified by realisation as ASIC or FPGA. MP algorithms shall be implemented on that architecture and for comparison purposes also on GPGPU many-core architectures to see if the superiority of emergent computing can also be exploited on such parallel architectures. Furthermore, the MP approach shall be expanded for configuring future nanoarchitectures. For the automatic design of MP behaviour we developed a design framework based on the evolution of Cellular Automata (CA) and Genetic Programming. To improve the quality of the framework’s evolved emergent computing scheme, we will introduce concepts for multi-evolution and eliminating of redundant CA. The generic approach of the tool to design arbitrary emergent control systems is shown for the Chemical Organization theory. The efficiency of an emergent hardwired path planning algorithm from us shall be demonstrated for the mobile robot OSCAR. Finally, our chip architecture shall exploit self-optimising features by using ASoC methods.