Quantum Code Design And Architecture

通用量子计算机必须遵循容错设计，以防止无处不在的退相干过程破坏计算。所有容错方法都需要额外的物理硬件来执行量子计算。Kitaev的表面代码（或称环面代码）是一个流行的想法，它吸引了许多硬件开发人员的心，也给了许多人希望，容错量子计算是一个现实的前景。主要的工业硬件开发商包括谷歌、IBM和英特尔。他们目前都致力于基于表面代码的容错体系结构。然而，不幸的是，详细的资源分析指出，使用这种方法需要大量的硬件，商业应用可能需要数百万个量子位。因此，改进容错设计是一个紧迫的近期问题。这一点尤其重要，因为硬件开发人员需要足够的时间做出反应并相应地调整路线。该联盟将启动一个欧洲协调方法，为容错量子计算设计新一代代码和协议。最终目标是为量子计算机开发高性能架构，大幅降低硬件需求，从而加速量子计算从学术界向工业界的过渡。为实现这些改进而开发的关键方向包括：高速率编码中大块逻辑量子位提供的规模经济;以及利用连续可变的自由度。该项目进一步旨在建立一个解决这些架构问题的欧洲社区，以便理论和实验之间的富有成效的反馈循环可以持续到项目本身的生命周期之外。该项目产生的实用协议和配方预计将成为构建可扩展量子信息处理器的标准武器库的一部分。

General purpose quantum computers must follow a fault-tolerant design to prevent ubiquitous decoherence processes from corrupting computations. All approaches to fault-tolerance demand extra physical hardware to perform a quantum computation. Kitaev's surface, or toric, code is a popular idea that has captured the hearts and minds of many hardware developers, and has given many people hope that fault-tolerant quantum computation is a realistic prospect. Major industrial hardware developers include Google, IBM, and Intel. They are all currently working toward a fault-tolerant architecture based on the surface code. Unfortunately, however, detailed resource analysis points towards substantial hardware requirements using this approach, possibly millions of qubits for commercial applications. Therefore, improvements to fault-tolerant designs are a pressing near-future issue. This is particularly crucial since sufficient time is required for hardware developers to react and adjust course accordingly.This consortium will initiate a European co-ordinated approach to designing a new generation of codes and protocols for fault-tolerant quantum computation. The ultimate goal is the development of high-performance architectures for quantum computers that offer significant reductions in hardware requirements; hence accelerating the transition of quantum computing from academia to industry. Key directions developed to achieve these improvements include: the economies of scale offered by large blocks of logical qubits in high-rate codes; and the exploitation of continuous-variable degrees of freedom.The project further aims to build a European community addressing these architectural issues, so that a productive feedback cycle between theory and experiment can continue beyond the lifetime of the project itself. Practical protocols and recipes resulting from this project are anticipated to become part of the standard arsenal for building scalable quantum information processors.