Acceleration of trigger algorithms with FPGAs at the LHC implemented using higher-level programming languages

博士项目的目标是通过引入一项新的关键技术：更高级别的可编程数据流引擎，促进大型强子对撞机触发的开发和实施。该项目将与伦敦的Maxeler Technologies密切合作，Maxeler Technologies是开发数据流计算引擎的先驱和领先者。LHC以40 MHz的速度碰撞质子，但像希格斯玻色子这样的“有趣”事件发生的频率要低得多。保留所有事件在技术上是不可行的，因此必须实时分析事件，以便从非常大的背景中只选择“感兴趣的”事件。为此，CMS使用了触发系统。触发系统的第二层，高级触发(HLT)基于一个拥有3万个CPU核心的群。大型强子对撞机将在未来五年左右进行升级，以提供更高的质子-质子相互作用速率。这对CMS HLT的实时数据处理提出了前所未有的挑战，需要比今天大几个数量级的处理能力。这远远超过了摩尔定律对传统CPU处理能力的预期增长，需要一种替代方法。该项目将研究允许CMS HLT应用程序在不同硬件上运行的可行性，即Maxeler的数据流引擎，目标是证明它们可以通过在最符合其特征的体系结构上运行计算任务的每一步来实现更高的吞吐量和更好的能效。现场可编程门阵列是解决这一问题的一个很好的候选者，提供高吞吐量和低功耗，使它们具有成本效益，然而，用低级语言编程的困难导致这项技术到目前为止一直被忽视。总部位于伦敦的Maxeler Technologies是开发和应用基于现场可编程门阵列的高性能计算(HPC)数据流计算引擎的世界领先者。Maxeler为基于FPGA的计算机创建了首个此类高级编程环境，无需使用低级语言对FPGA进行编程，使科学家完全可以使用该技术。该项目建立在Imperial和Maxeler之间非常成功的先前案例学生合作(ST/L002728/1)的基础上。上一个项目展示了Maxeler的高级编程方法在低延迟数据处理环境中的适用性，并在使用Maxeler的开发环境和硬件加速触发算法和在FPGA中实现机器学习算法方面迈出了第一步。该项目旨在证明，使用Maxeler的编程环境编写的触发算法可以满足CMS触发器所面临的严格时序要求。Imperial将与Maxeler合作，为触发算法的实施进一步优化他们的编程环境，并研究Maxeler的数据流计算技术对更高级别触发器的性能改进。将探索在现场可编程门阵列中实施复杂算法的各种方法，包括机器学习，以满足STFC科学方案的许多数据处理方面的关键需求。

The goal of the PhD project is to facilitate development and implementation of triggering at the LHC by introducing a new key technology: higher-level programmable dataflow engines. The project will be conducted in close collaboration with Maxeler Technologies, London, the pioneer and leader in development of dataflow computing engines.The LHC collides protons at a rate of 40 MHz, however "interesting" events, such as those containing the Higgs boson, occur far less frequently. It is technologically infeasible to retain every event and so events must be analysed in real time to select only the "interesting" ones from the very large background. To do this, CMS uses a trigger system. The second tier of the trigger system, the Higher-Level Trigger (HLT) is based on a farm of 30 000 CPU cores.The LHC will be upgraded over the next five years or so to deliver a higher proton-proton interaction rate. This presents an unprecedented challenge to the real-time data processing of the CMS HLT, requiring processing power orders of magnitude larger than today. This exceeds by far the expected increase in processing power for conventional CPUs from Moore's Law, demanding an alternative approach.This project will study the feasibility of allowing the CMS HLT applications to run on heterogeneous hardware, Maxeler's dataflow engines, with the goal of demonstrating that they can achieve higher throughput and better energy efficiency by running each step of a computing task on the architecture that best matches its characteristics. FPGAs are an excellent candidate to solve this problem, offering high throughout and low power consumption, making them cost effective, however the difficulty in programming FPGAs in low-level languages has resulted in this technology being over-looked until now.London-based Maxeler Technologies is the world leader in the development and application of FPGA-based dataflow computing engines for high-performance computing (HPC). Maxeler has created a first-of-its-kind higher-level programming environment for FPGA-based computers that eliminates the need to program the FPGAs using low-level languages, making the technology fully accessible to scientists.The project builds on a highly successful previous CASE studentship collaboration between Imperial and Maxeler (ST/L002728/1). The previous project demonstrated the applicability of Maxeler's high-level programming approach in low-latency data processing environments and also took the first steps into the use of Maxeler's development environment and hardware in accelerating trigger algorithms and implementing Machine Learning algorithms in FPGAs. This project aims to demonstrate that triggering algorithms written using Maxeler's programming environment can meet the stringent timing requirements faced in the CMS trigger. Imperial will work with Maxeler to further optimise their programming environment for the implementation of triggering algorithms and study the performance improvement to the Higher-Level Trigger offered by Maxeler's dataflow computing technology. Various approaches to the implementation of sophisticated algorithms, including Machine Learning, in FPGAs will be explored, addressing a key need for many data-processing aspects of the STFC science programme.