Development of silicon carbide plasma etch processes for next generation power electronics

研究工程师将开发碳化硅（SiC）等离子体蚀刻的新工艺，并开发基于SiC器件的电力电子新应用。SiC功率器件市场将在电动汽车市场的推动下呈指数级增长。混合动力（HEV）/电池电动汽车（BEV）动力系统的趋势是利用高电池容量系统将直流电压推至600 V以上。其目的是减少目前阻碍电动汽车性能的苛刻布线要求。在600 V以上，唯一可行的功率半导体器件选择，可以达到所需的效率水平是SiC。SiC功率MOSFET将用于主逆变器动力系统，包括DC升压转换器级（如需要）。此外，到2023年，这些高压电动汽车的销量将达到1800万辆。考虑到这一数字占全球汽车总销量的16.2%，市场相关性就变得显而易见了。研究工程师将开发SiC器件、等离子切割和新掩模涂层的工艺技术。蚀刻掩模材料需要坚固的涂层来图案化和蚀刻SiC晶片中的沟槽结构。这些材料涂层可以是聚合物、聚合物或金属。将使用SPTS工具沉积这些涂层进行测试。掩模涂层开发将包括保形电介质（SPTS MVD系统）。这些涂层也将用于接触焊盘和栅极结构。将开发进一步的工艺以在SiC中制造金属氧化物半导体场效应晶体管（MOSFET）。新型SiC沟槽MOSFET的设计将进行研究。SiC沟槽MOSFET被视为SiC功率器件的未来，其减小的器件间距使得每单位面积的器件数量更大，从而实现更低的成本。挑战在于通过有效的掩模涂层和工艺控制来最大限度地减少侧壁微沟槽和条纹。这些SiC功率器件将进行高压应用测试，例如用于太阳能/风能电源和电动/混合动力汽车电源转换的DC/AC转换器中的高效逆变器。研究工程师将与APS SPTS Technologies电介质蚀刻工具合作，开发等离子体蚀刻配方，以生产垂直侧壁。蚀刻工艺也将进一步研究，以开发用于SiC等离子体切割的深蚀刻工艺。等离子体切割是SPTS硅蚀刻工具的标志性工艺，但切割技术尚未完全开发用于SiC。未来的电力电子器件将需要SiC等离子体切割工艺来减小芯片尺寸并增加制造灵活性。该项目的挑战将是掩模材料的开发，该材料需要保持高分辨率特征并在强烈的等离子体蚀刻工艺中存活。此外，开发一种高功率蚀刻工艺，该工艺可以以高速率（1微米/分钟）蚀刻通过SiC，同时保持垂直（和平滑的沟槽壁）。这对功率器件和等离子体切割工艺的发展都很重要。拟议研究的成果是多方面的，包括（i）为高功率真空蚀刻工具创造新的掩模材料，（ii）为沟槽和等离子体切割应用开发新的深SiC蚀刻工艺，（iii）表征基于SiC材料的高压应用的新功率电子器件。

The Research Engineer will develop new processes for plasma etching of Silicon Carbide (SiC) and develop new applications in Power Electronic based on SiC devices.The market for SiC power devices is set to grow exponentially - driven by the electric vehicles market. The trend in terms of hybrid (HEV) / battery electric vehicle (BEV) powertrains is to push the DC voltage to beyond 600V, utilising high battery capacity systems. The purpose here is to reduce the demanding cabling requirements currently hampering electric vehicle performance. Beyond 600V, the only viable power semiconductor device option that can achieve the required efficiency levels is SiC. SiC power MOSFETs will be used within the main inverter powertrain, including a DC boost converter stage if required. Moreover, these higher voltage electric vehicle sales are set to reach 18 million by 2023. When one considers that this represents 16.2% of total global vehicle sales, the market relevance becomes obviously apparent.The Research Engineer will develop process technology for SiC devices, plasma dicing and new mask coatings. Robust coatings are required for etch-mask materials to pattern and etch trench structures in SiC wafers. These material coatings could be polymers, dielectrics or metals. These coatings will be deposited using SPTS tools for testing. Mask coating development will include conformal dielectric (SPTS MVD system). These coatings will also be trialled for contact pad and gate structures. Further processes will be developed to fabricate metal-oxide-semiconductor field-effect transistors (MOSFETs) in SiC. Novel SiC trench MOSFET designs will be investigated. SiC trench MOSFETs are seen as the future of SiC power devices, with the reduced device pitch enabling a greater number of devices per unit area and thus, enabling lower cost. The challenge is to minimise sidewall microtrenching and striation through efficient mask coatings and process control.These SiC Power devices will be tested for high voltage applications such as high-efficiency inverters in DC/AC converters for solar/wind power supplies and electric/hybrid vehicles power conversion.The Research Engineer will work with the APS SPTS Technologies dielectric etch tool to develop plasma etch recipes to produce vertical side walls. Etch processes will also be investigated further to develop a deep etch process for SiC plasma dicing. Plasma dicing is a signature process for SPTS's silicon etch tools, but dicing technology has not been fully developed for SiC. The future of power electronic devices will require SiC plasma dicing processes to decrease die size and increase fabrication flexibility.The challenges for this project will be the development of the masking material, which needs to maintain high resolution features and survive the intense plasma etch process. Additionally, developing a high power etch process that can etch through SiC at high rates (1 micrometre /minute) whilst maintaining vertical (and smooth trench walls). This will be important for both the development of power devices and the plasma dicing process.The outcomes of the proposed research are multiple and include (i) creating new masking materials for high power vacuum etch tools, (ii) developing new plasma processes for deep SiC etching for both trench and plasma dicing application (iii) characterising new power electronic devices for high voltage applications based on SiC materials.