Exploring advanced technologies and architectures for massevely parallel processing systems based on networks-on-chip

在不久的将来，技术扩展将允许包含数百个复杂核心的片上系统（soc）。这些系统在不同的利基市场中无所不在，例如便携式/无线、宽带、互联网交换、大容量存储、消费产品、计算机和汽车。设计灵活的高性能SoC架构的一种有前途的方法是将它们组织为多处理器，其中处理器之间有效通信的能力至关重要。未来的片上带宽需求将达到几百Gbit/s。如今，总线被广泛使用，但由于其带宽通常在多个模块之间共享，因此难以扩展，因此总线日益成为系统的瓶颈。未来高度并行的soarchitecture面临的一个重大挑战是避免通信成为它们的系统瓶颈。片上网络（noc）已被提出作为解决这些问题的一种手段，以实现具有数百个计算核心的SoC通信基础设施。noc试图在可重用性、可扩展性、并行性和容错性方面满足未来soc的要求。此外，soc目前是多种技术（如光学、机械、电气等）融合的主要驱动力，这是一种更有效的并行架构。因此，集成光网络被认为是传统互连的一个有趣的替代方案。在此背景下，该项目的主要目标是探索满足这些要求的三个领域：1)探索NoC的先进架构，2)探索下一代NoC的光学技术，以及3)基于1)和2)中提出的先进NoC架构在并行片上系统上执行和比较映射。

Technology scaling will allow Systems-on-Chip (SoCs) containing hundreds of complex cores in the nearfuture. These systems are omnipresent in different niche market such as portable/wireless, broadband, Internetswitching, mass storage, consumer products, and computers and automotive. A promising approach to design flexible high performance SoC architectures is to organize them as multiprocessors, where the ability for processors to communicate effectively with each other is critical. Tomorrow's on-chip bandwidth requirements will reach several hundreds of Gbit/s. Nowadays, buses are widely used, but they are increasingly becoming system bottlenecks as their bandwidth is usually shared between several modules, and are thus hard to scale. A significant challenge with future highly parallel SoCarchitectures is to avoid communications being their system bottleneck. Networks on Chip (NoCs) have beenproposed as a means to address these issues of achieving the communication infrastructure for SoC withhundred of computational cores. NoCs attempt to meet the requirements for future SoCs with respect toreusability, scalability, parallelism and fault tolerance. Furthermore, SoCs are presently the main drivers for theconvergence of multiple technologies (e.g. optical, mechanical, electrical, etc.), this promising more efficientparallel architectures. Thus, integrated optical networks are considered as an interesting alternative totraditional interconnects. In this context, the main objective of this project is to explore three domains that will allow meeting these requirements: 1) explore advanced architectures for NoC, 2) explore optical technology for next generation ofNoC and 3) perform and compare mapping on parallel systems-on-chip based on the advanced NoCsarchitecture proposed in 1) and 2).