Design and verification of embedded systems in the context of the ESL paradigm

ESL 范式背景下嵌入式系统的设计和验证

• 批准号: 121477-2009
• 负责人: Bois, Guy
• 金额: $ 1.82万
• 依托单位: École Polytechnique de Montréal
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2012
• 资助国家: 加拿大
• 起止时间: 2012-01-01 至 2013-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=505527
• 关键词: Design; verification; embedded; systems; context

Technology advances have a tremendous effect on the complexity of chips. To enhance productivity in the fields of design and verification of systems on chips, higher levels of abstraction must be defined. This led to the concepts of ESL (Electronic System Level) design and verification, an emerging electronic design methodology that focuses on the higher abstraction level concerns first and foremost. ESL is defined as the utilization of appropriate abstractions in order to increase comprehension about a system, and to enhance the probability of a successful implementation of functionality in a cost-effective manner. For instance, the designer productivity can be greatly improved using a transactional level model that abstracts the functionalities of the system being designed. To answer this abstraction issue, researchers have proposed the concept of platform.

技术进步对芯片的复杂性产生了巨大的影响。为了提高芯片系统设计和验证领域的生产率，必须定义更高级别的抽象。这导致了ESL(电子系统级)设计和验证的概念，ESL(电子系统级)设计和验证是一种新兴的电子设计方法，首先关注更高的抽象级别。ESL被定义为利用适当的抽象来增加对系统的理解，并以具有成本效益的方式增强成功实现功能的可能性。例如，使用抽象正在设计的系统的功能的事务级模型可以极大地提高设计人员的工作效率。为了回答这一抽象问题，研究人员提出了平台的概念。