Design and verification of embedded systems in the context of the ESL paradigm

点击翻译按钮获取中文摘要

Technology advances have a tremendous effect on the complexity of chips. To enhance productivity in the fields of design and verification of systems on chips, higher levels of abstraction must be defined. This led to the concepts of ESL (Electronic System Level) design and verification, an emerging electronic design methodology that focuses on the higher abstraction level concerns first and foremost. ESL is defined as the utilization of appropriate abstractions in order to increase comprehension about a system, and to enhance the probability of a successful implementation of functionality in a cost-effective manner. For instance, the designer productivity can be greatly improved using a transactional level model that abstracts the functionalities of the system being designed. To answer this abstraction issue, researchers have proposed the concept of platform.