On-chip instrumentation for analog / mixed-signal silicon debug, diagnosis and manufacturing test

随着集成电路的复杂性越来越高，达到数千万晶体管的规模，电子元件和系统制造商正朝着第三方电子组件(称为核心)的方向发展。除了明显需要标准来协助它们的集成之外，个别验证和最终测试的需要对整体产品的成功至关重要。从数字设计的角度来看，适当的设计和测试方法在很大程度上已经到位。扫描链技术将继续用于传输关于复杂IC的数字测试信息，而不考虑核心的来源。相反，没有一种简单的方法可以在不严重降低IC的信噪比和高频频谱含量的情况下在IC周围移动模拟测试信息。目前，片上采样示波型电路和时间-数字转换电路在以非常高的信号频率以及可接受的精度和准确度观察芯片上的信号方面显示出巨大的前景。随着测试信息被采样并转换成数字形式，测试信息可以在IC中轻松地移动而不会丢失信息，并且可以轻松地集成到现有的数字测试结构、总线和协议中。片上采样器和时间-数字转换器在实践中取得成功的另一个重要原因是它们只需要很少的硅面积来实现。此外，对被测电路性能的影响很小。在类似的考虑下，本研究项目将考虑开发其他类型的嵌入式电路，可以用于直接在片上观察信号。由于工艺可变性影响到所有的模拟电路，本项目将进一步考虑如何通过外部数字控制直接在片上实时或片外校准此类嵌入式仪器。其目标将是构建需要很小的硅面积并且对构建块的功率和性能影响很小的电路。在所有情况下，实验IC都将使用加拿大微系统公司(CMC)提供的最先进的CMOS制造技术来制造。

With the growing complexity of integrated circuits reaching the tens-of-million-plus transistor scale, electronic component and system manufacturers are moving towards a commence in third-party electronic component wares (called cores).  Besides the obvious need for standards to assist in their integration, the need for individual validation and final test is paramount to the overall product success.  From a digital design perspective, the appropriate design and test methodologies are, for the most part, already in place.  Scan chain techniques will continue to be used to move digital test information about a complex IC, regardless of the core origin.  In contrast, no simple method exists in which to move analog test information around an IC without serious degradation of its signal-to-noise ratio and high-frequency spectral content.  At the moment, on-chip sampling-scope-type circuits and time-to-digital converter circuits are showing great promise for observing signals on-chip at very high signal frequencies, as well with acceptable precision and accuracy. As the test information is sampled and converted into digital form, test information can be easily moved around the IC without loss of information and easily integrated into existing digital test structures, buses and protocols. Another important reason for the practical success of the on-chip sampling scope and time-to-digital converter is the fact that they require very little silicon area to implement. Furthermore, the impact on the performance of the circuit-under-test is minimal. Following similar considerations, this research project will consider developing other types of embedded circuits that can be used to observe signals directly on-chip.  As process variability affects all analog circuits, this project will further consider how such embedded instruments can be calibrated directly on-chip in real-time or off-chip through external digital control. The objective will be to construct circuits that require little silicon area and have little impact on the building block's power and performance. In all cases, experimental ICs will be constructed in state-of-the-art CMOS fabrication technologies made available through the Canadian Microsystems Corporation (CMC).