A radiation hardened matrix computational module (MCM) for self-healing Field Programmable Gate Array (FPGA)

由于电子电路的日益小型化，辐射对部署在空间和地球轨道上的电子电路的影响是麦哲伦航空航天公司等卫星电信组织日益关注的问题。Satellite拥有使用现场可编程门阵列（FPGA）技术、微处理器和专用集成电路的机载计算机。FPGA和其他基于电子的计算机容易受到称为单粒子翻转的现象的影响。宇宙射线从太空中的一个源发出，与地球的大气层相互作用，产生电离粒子簇射形式的辐射。当这些簇射的粒子撞击FPGA内的晶体管（存储器元件的组件）的衬底时，它们沉积存款电荷，这可能导致相关联的存储器元件中的存储值（位值）的改变。因此，在FPGA计算机上运行的软件程序可能发生故障，这可能导致：不安全的操作条件;使命的结束;没有结果的昂贵使命;并且甚至可能对机载或陆地上的个人造成伤害。大多数可用的辐射防护（硬化）系统不能提供100%完全屏蔽辐射和电离。例如，FPGA制造商提供内部加固选项，应用程序开发人员可以将容错算法添加到在FPGA上运行的软件和硬件中。然而，由于能源效率、硬件不动产和经济限制，对辐射的防护水平是有限的。例如，在存储器中只能纠正一个错误，但由于辐射的影响，可能会出现多个错误。为了妥善解决这一问题，必须在各个层面结合并应用缓解技术，包括尖端研究技术和制造商提供的缓解方案。对于一个特定的应用程序，我们建议提供一个计划，以实现制造商的缓解技术和硬件冗余（TMR）。此外，还有更多

Due to the increasing miniaturization of electronic circuits, the effect of radiation on electronic circuits deployed in space and in Earth orbit is a growing concern for satellite telecommunications organizations, such as Magellan Aerospace. Satellites have on board computers which use Field Programmable Gate Array (FPGA) technology, microprocessors, and application specific integrated circuits. The FPGA and other electronic based computers are susceptible to a phenomenon called single event upset. Cosmic rays emanating from a source in space interact with the Earth's atmosphere and produce radiation in the form of showers of ionized particles. When the particles of these showers hit the substrate of a transistor (component of a memory element) within an FPGA, they deposit charge, which may cause a change in the stored value (bit value) in the associated memory element. Consequently, a software program running on the FPGA computer may malfunction, which may lead to: unsafe operating conditions; end of mission; unfruitful costly mission; and may even cause harm to individuals on-board or on-land. Most available radiation protection (hardening) systems are not able to provide 100% complete shielding against radiation and ionization. For example, FPGA manufacturers provide internal hardening options, and application developers may add fault tolerance algorithms to their software and hardware running on the FPGAs. However, due to energy efficiency, hardware real-estate, and economical constraints, the level of protection against radiation is limited. For instance, only one error can be corrected in memories, but multiple errors may occur due to the effects of radiation. To properly address the problem, mitigation techniques must be combined and applied at all levels, including cutting edge research techniques and the manufacturer supplied mitigation options. For a specific application, we propose to provide a plan to implement the manufacturer's mitigation techniques and hardware redundancy (TMR). In addition, and more