Low Power, Area Efficient, High Speed Algorithms and Architectures for Computer Arithmetic, Pattern Recognition and Cryptosystems

拟议研究的目标是： (A)进一步扩展F(2**m)中有限域乘法的最新发展水平，以应用于椭圆曲线密码系统。我们将在晶体管级别将所建议的体系结构作为ASIC来实现，以降低功耗并提高速度。我们还将把GPU配置作为实施我们建议的体系结构的范例。 (B)进一步扩展使用连续值数字系统(CVN)设计、实现和应用算术电路的最新水平。将研究这种数字系统在多层神经网络中的应用。将对由此产生的下一代电路设计进行彻底的评估，并将它们与当前最先进的二元设计进行比较。 (C)进一步开发用于模式识别应用的稳健和低错误率算法。 具体地说，我们对使用新的特征提取器和分类器的人脸识别等应用程序感兴趣。我们正在研究开发适用于遮挡、光照变化或弱光照和低分辨率情况下的人脸识别算法。我们将着眼于这些算法的优化，以便在高速运算和低功耗架构的GPU上实现。我们将进一步探索开发新的3D图像人脸识别算法。还将调查能够支持蜂窝智能手机上的人脸识别功能的算法和架构的开发，这些功能可以用于基于视觉提示的优化功能、安全性和电源管理。 这项研究被认为具有重要意义，因为在许多对加拿大有利的不同应用领域的进一步进展取决于开发具有竞争力的低成本、低功耗、高速、区域高效的DSP算法和架构，以实现协同。

The objectives of the proposed research are: (a) To further extend the state-of-the-art for the Finite Field Multiplication in F(2**m) for applications to elliptic curve cryptography. We will look at implementation for the proposed architectures as ASIC at the transistor level to reduce power consumption and to improve speed. We will also look at GPU configurations as a paradigm for implementation of our proposed architectures. (b) To further extend the state-of-the-art for the design, implementation and application of arithmetic circuits using the Continuous Valued Number System (CVNS).The application of this number system for multi-layer neural networks will be investigated. A thorough evaluation of the resulting next-generation circuit designs and their comparison with current state-of-the-art binary designs will be carried out. (c) To further develop robust and low error rate algorithms for pattern recognition applications. Specifically we are interested in applications such as human face recognition using new feature extractors and classifiers. We are looking into developing algorithms for face recognition under occlusion, varying or poor illumination and low resolution. We will be looking at the optimization of these algorithms for implementation on both GPU, for high speed operation, and low-power architectures. We shall further explore the development of new algorithms for face recognition with 3-D images. The development of algorithms and architectures that can support a face recognition capability on cellular smart phones that can be used to optimize functionality, security and power management based on visual cues will also be investigated. This research is considered significant as further progress in a number of diverse application areas beneficial to Canada is contingent upon developing competitive low-cost, low-power, high-speed area efficient DSP algorithms and architectures that enable synergy.