Low Power, Area Efficient, High Speed Algorithms and Architectures for Computer Arithmetic, Pattern Recognition and Cryptosystems

提出的研究目标是：(a)进一步扩展F（2**m）中有限域乘法的最新技术，以应用于椭圆曲线密码术。我们将着眼于在晶体管级实现ASIC架构，以降低功耗并提高速度。我们还将把GPU配置作为实现我们提出的架构的范例。(b)进一步扩展使用连续数值系统（CVNS）设计、实施和应用算术电路的最新技术。研究了该数字系统在多层神经网络中的应用。将对下一代电路设计进行全面评估，并与当前最先进的二进制设计进行比较。(c)为模式识别应用进一步发展稳健和低错误率的算法。具体来说，我们对使用新的特征提取器和分类器的人脸识别等应用感兴趣。我们正在研究开发在遮挡、光照变化或较差以及低分辨率下的人脸识别算法。我们将着眼于这些算法的优化，以便在GPU、高速操作和低功耗架构上实现。我们将进一步探讨三维图像人脸识别新算法的发展。还将研究支持蜂窝智能手机面部识别功能的算法和架构的开发，该功能可用于优化基于视觉线索的功能、安全性和电源管理。这项研究被认为是重要的，因为对加拿大有益的许多不同应用领域的进一步进展取决于开发具有竞争力的低成本，低功耗，高速区域高效的DSP算法和架构，从而实现协同作用。

The objectives of the proposed research are:(a) To further extend the state-of-the-art for the Finite Field Multiplication in F(2**m) for applications to elliptic curve cryptography. We will look at implementation for the proposed architectures as ASIC at the transistor level to reduce power consumption and to improve speed. We will also look at GPU configurations as a paradigm for implementation of our proposed architectures.(b) To further extend the state-of-the-art for the design, implementation and application of arithmetic circuits using the Continuous Valued Number System (CVNS).The application of this number system for multi-layer neural networks will be investigated. A thorough evaluation of the resulting next-generation circuit designs and their comparison with current state-of-the-art binary designs will be carried out.(c) To further develop robust and low error rate algorithms for pattern recognition applications. Specifically we are interested in applications such as human face recognition using new feature extractors and classifiers. We are looking into developing algorithms for face recognition under occlusion, varying or poor illumination and low resolution. We will be looking at the optimization of these algorithms for implementation on both GPU, for high speed operation, and low-power architectures. We shall further explore the development of new algorithms for face recognition with 3-D images. The development of algorithms and architectures that can support a face recognition capability on cellular smart phones that can be used to optimize functionality, security and power management based on visual cues will also be investigated.This research is considered significant as further progress in a number of diverse application areas beneficial to Canada is contingent upon developing competitive low-cost, low-power, high-speed area efficient DSP algorithms and architectures that enable synergy.