Mirrored Memristor Crossbar Array for Digital and Analog Implementation of Computer Arithmetic and, Spiking Neural Networks

忆阻器在集成电路设计、计算和应用的几个领域具有增强或扩大的潜力。忆阻器器件设计和制造的最新进展将使其成为未来可负担得起的集成电路的核心使能技术，这些集成电路需要可扩展，节能和可重构。忆阻器与CMOS结构的兼容性使其成为各种不同应用的理想器件。其中包括：逻辑运算、用于低功耗高速一维和二维数字信号处理（DSP）的神经形态器件、非易失性存储器、模拟电子器件以及可自主学习和适应的可重构电路和硬件。忆阻器交叉栅架构被认为是未来存储器、逻辑和内存计算应用中最有前途的平台之一。***提出的研究目标是：***(a)进一步开发最先进的基于记忆的架构和电路，用于数字设计、有限域乘法器、计算机算法、神经网络、数字滤波器等应用。利用申请人及其学生开发的连续数值系统（CVNS）进一步探索算术电路的设计，并使用忆阻器设计了一个完全模拟的神经网络。我们计划通过消除反馈和/或减少所需晶体管的数量来开发一种面积高效的镜像忆阻交叉条架构。***(b)峰值神经网络（snn）最近出现，具有广泛应用的良好潜力，如模式识别，聚类等。已经证明，这些网络可以与大脑的一些活动和功能非常相似。文献中报道了许多精确定义行为和神经元功能的模型。对于实际实现来说，这些模型大多非常复杂。我们将努力为snn的数字实现开发一个准确而有效的模型，该模型与文献中提出的模型非常接近。我们将考虑资源需求与更高的准确性之间的权衡，使设计人员能够选择适合他/她的应用程序的模型。我们还将研究通过Spike Time Dependent Plasticity （STDP）方法训练snn的新方法，用于模式识别等应用。我们将尝试开发一种基于记忆器的snn数字实现，用于模式识别应用。忆阻器被认为是纳米电子电路的可行技术，也是许多CMOS器件的未来替代品。这方面的研究对加拿大在不断变化的世界经济中保持竞争力非常重要。此外，这项研究将导致具有竞争力的低成本、低功耗、高速和面积效率的计算机算法，以及DSP算法和可重构架构，从而实现协同。

Memristor has the potential to enhance or augment several areas of integrated circuit design, computing and application. Recent progress in the design and fabrication of Memristor devices will enable them to be a core enabling technology for future affordable integrated circuits that need to be scalable, energy-efficient and reconfigurable. A Memristor's compatibility with CMOS structures make them an ideal device for various diverse applications. These include: logic operations, neuromorphic devices for high speed one and two-dimensional digital signal processing (DSP) with low power consumption, non-volatile memory, analogue electronics, and reconfigurable circuits and hardware that can learn and adapt autonomously. Memristor crossbar architectures are considered as one of the most promising platforms for future memory, logic and in-memory calculation applications.***The objectives of the proposed research are :***(a) To further develop the state-of-the-art Memristive based architectures and circuits for applications on digital design, finite field multipliers, computer arithmetic, neural networks, digital filters, few to mention. To further explore the design of arithmetic circuits using Continuous Valued Number System (CVNS) developed by the applicant and his students using Memristors for the design of a fully analogue neural network. We plan to develop an area-efficient Mirrored Memristive Crossbar Architecture by either eliminating feedback and/or reducing the number of transistors required.***(b) Spiking Neural Networks (SNNs) have emerged recently with a good potential for a wide ranges of applications like pattern recognition, clustering etc. It has been demonstrated that these networks can closely resemble some of the activities and function of the brain. There are many models reported in the literature that precisely define behavior and the functionality of their neurons. These models are mostly very complicated for practical implementation. We shall work to develop an accurate and efficient model for the digital implementation of SNNs which closely approximate models presented in the literature. We would look at the trade off for resource requirements versus higher accuracy that enable the designer to choose the model that fit his/her application. We shall also investigate novel ways of training SNNs through Spike Time Dependent Plasticity (STDP) methods for applications, such as, pattern recognition. We shall try to develop a Memrisor based digital implementation of SNNs for pattern recognition applications. The Memristor is being regarded as the viable technology for nano electronic circuits and a future replacement for many CMOS devices. Research in this area is very important for Canada to be competitive in the evolving world economy. Furthermore, this research will lead to competitive low-cost, low-power, high-speed and area-efficient computer arithmetic, and DSP algorithms and reconfigurable architectures that enable synergy.