An energy efficient platform for mobile computing

我们的移动设备正在努力满足终端用户的期望和工程现实。这些设备的计算能力是由移动应用的指数级增长驱动的，以支持消费者的便利性、社交网络、安全性和生产力等环境。因此，移动存储器带宽每两年翻一番，预计到2017年，64gb /s的移动存储器带宽需求将远远超过行业标准存储器接口技术的预计容量。然而，电池技术和热预算的进步却落后了。根据目前的趋势和国际半导体技术路线图（ITRS）预测，到2024年，手持设备将消耗大约7瓦的功率，而预计的热预算将限制为1瓦。总而言之，未来移动计算的主要挑战是：更低的读写带宽、更高的延迟以及给定电池寿命下有限的处理能力。这项研究计划的动机是这些挑战。移动系统的能量低效率主要源于硬件的限制，硬件的设计是为了支持最高容量或峰值性能。然而，系统的最高容量仅在其运行时间的一小部分被利用，而大多数时间系统都未得到充分利用。尽管系统未得到充分利用，但现有的硬件不允许相应地扩展能耗。本研究旨在实现基于以下几个关键思想的节能高性能移动平台：可扩展的片上网络，使节能并行数据处理。2. 智能资源管理，可以感知处理器负载，并相应地启用、关闭或更改核心的频率，以不同的速率进行计算。3. 灵活、细粒度的动态电压和频率缩放方案，使资源管理器能够最大限度地提高能源效率。4. 能量成比例，高带宽存储器接口。我的研究的成功执行将塑造移动处理器和存储器路线图，以能源意识的方式满足未来移动计算的需求。

Our mobile devices are struggling to meet end-user expectation and engineering reality. Compute capability of these devices are driven by exponential growth in mobile apps to support consumer convenience, context such as social networking, security and productivity. As a result, the mobile memory bandwidth is doubling every two years, and predicted 64 Gb/s mobile memory bandwidth requirement by 2017 will be well beyond the projected capacity of industry standard memory interface technology. However, advance in battery technology and thermal budget is falling behind. Based on current trend and international technology road map for semiconductor (ITRS) projection, in 2024 a hand held device will dissipate approximately 7 Watts of power whereas the projected thermal budget sets the limit to be 1 watt only. To summarize, main challenges for future mobile computing are: lower read and write bandwidth, higher latency, and limited processing power for the given battery life. This research proposal is motivated by these challenges. Energy inefficiency in mobile systems is mainly originated from limitation of hardware which is designed to support the highest capacity or peak performance. However, highest capacity of the system is utilized for only a small fraction of its operating time, and most of the time the system is under-utilized. Although the system is under-utilized, the existing hardware does not allow energy consumption to scale accordingly. This research aims at enabling energy efficient high performance mobile platform that will be built upon several key ideas: 1. Scalable on-chip network that enables energy efficient parallel data processing. 2. An intelligent resource management that can sense processor load, and accordingly enable, shutdown or change frequency of the core to compute at a different rates. 3. Agile, fine grained dynamic voltage and frequency scaling schemes that enables the resource manager to maximize energy efficiency. 4. Energy proportional, high bandwidth memory interface. Successful execution of my research will shape mobile processor and memory road map that meets the demand for future mobile computing in an energy conscious manner.