Investigation of Nanoengineered III-V Buffer Layers for Hetero-integration on Silicon

硅光子学在收发模块等应用中最具技术挑战性和最昂贵的方面之一是激光源的结合。困难包括从激光芯片到硅光子学芯片的光耦合不良，激光设备的热提取和温度灵敏度，用于激光设备的基板成本，激光器的反馈灵敏度需要结合笨重的光学隔离器和透镜，以及昂贵的包装和专门的制造步骤。所有这些问题都会导致产量下降、成本增加和生产时间延长。由Harry Ruda教授领导的多伦多大学的研究人员已经率先开始展示一种技术，通过这种技术可以直接在（100）硅衬底上生长具有低缺陷密度的单晶InGaAs。在这里，我们与华为技术有限公司合作，提出开发和优化基于纳米模板方法的方法，以提供与硅无源光学器件以及硅微电子器件集成的有源III-V光学器件。该技术的成功开发将促进（i)实现高性能光电子应用所需的无缺陷III-V区（ii）光学器件（如激光器）所需的硅和III-V层之间的紧密耦合，其中III-V区作为与硅波导耦合的有源介质）。此外，这里设想的无位错混合生长使用工业标准Si(100)，而不是非标准的6度错切Si衬底，并大大提高了将其整合到现有技术中的便利性。

One of the most technically challenging and expensive aspects of silicon photonics for applications such as transceiver modules is the incorporation of a laser source. Difficulties include poor coupling of light from the laser chip to the silicon photonics chip, heat extraction from and temperature sensitivity of the laser device, cost of substrates used for the laser device, feedback sensitivity of the laser requiring incorporation of bulky optical isolators and lenses, and expensive packaging and specialized fabrication steps. All of these issues translate to a decreased yield, increased cost, and longer production time.Researchers at the University of Toronto, led by Prof. Harry Ruda, have pioneered and begun to demonstrate a technique by which single-crystal InGaAs with low defect density can be directly grown on a (100) silicon substrate. Here, in collaboration with Huawei Technologies, we propose to develop and optimize an approach based on leveraging nano-templating method to provide integration of the active III-V optical devices with Si passive optics as well as Si microelectronics. A successful development of the proposed technology will facilitate (i) realization of defect-free III-V regions required for high-performance opto-electronics applications (ii) close coupling between Silicon and III-V layers necessary for optical devices such as lasers with the III-V region as the active medium coupled to waveguides in Silicon. Further, dislocation-free hybrid growth envisaged here uses industry standard Si (100) as opposed to non-standard 6 degree miscut Si substrates, and dramatically enhances the ease of their incorporation into existing technology.