Novel Isolation Structure for High-Voltage Integrated Superjunction MOSFETs

Novel Isolation Structure for High-Voltage Integrated Superjunction MOSFETs
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高压集成超级结 MOSFET 的新型隔离结构

DOI:
10.1109/led.2019.2956151
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发表时间:
2020-01
影响因子:
4.9
通讯作者:
Tang Fang
Tang Fang
中科院分区:
工程技术2区
文献类型:
--
作者:
Lin Zhi;Guo Jingwei;Wang Zhihao;Li Ping;Hu Shengdong;Zhou Jianlin;Tang Fang

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提出了一种高压集成超结MOSFET的新型隔离结构。该结构由串联的横向SJ二极管与蚀刻下面的n-缓冲层和n-衬底。理论分析表明,其击穿电压由串联二极管的数目和柱的掺杂浓度共同决定。该结构可将半桥臂的两个SJ MOSFET集成在同一芯片上。设计为柱浓度为4 × 10^{{15}}$ cm-3的10 A器件的隔离区仅占芯片面积的2.7%。击穿最初发生在器件区域。利用谐振电路进行的瞬态仿真表明,两个SJ MOSFET可以在不相互干扰的情况下工作。
A novel isolation structure for high-voltage integrated superjunction (SJ) MOSFETs is proposed in this letter. The structure consists of serial lateral SJ diodes with etched underlying n-buffer layers and n-substrates. A theoretical analysis shows that its breakdown voltage is determined by both the number of serial diodes and the doping concentration of pillars. Two SJ MOSFETs of a half-bridge leg can be integrated on a single chip by using the proposal structure. The isolation region for 10 A devices designed with a pillar concentration of $4\times 10^{{15}}$ cm−3 occupies only 2.7% of the chip area. Breakdown initially occurs in the device area. A transient simulation using a resonance circuit reveals that the two SJ MOSFETs can work without interfering with each other.
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