A review of selective area grown recess structure for insulated-gate E-mode GaN transistors
A review of selective area grown recess structure for insulated-gate E-mode GaN transistors
复制标题
绝缘栅E型GaN晶体管选择性区域生长凹槽结构综述
DOI：
10.7567/1347-4065/ab4e5e
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发表时间：
2019-11
影响因子：
1.5
通讯作者：
Yang Liu
中科院分区：
文献类型：
--
作者：
Liang He;Fan Yang;Yao Yao;Yue Zheng;Jialin Zhang;Liuan Li;Zhiyuan He;Yiqiang Ni;Xin Gu;Yang Liu
凹槽结构是绝缘栅e型GaN晶体管的主要结构之一。本文提出了用选择性面积生长法（SAG）制造无损伤凹栅器件的方法，并对其工艺优化和结构演变的相关进展进行了综述。首先，通过界面分离（传导界面和再生界面）和n型Si杂质去除对SAG工艺进行优化，获得高质量的AlGaN/GaN异质结构。通过与传统刻蚀方法的比较，证明了SAG方案实现具有小v滞后的e模Al2O3/GaN MISFET的可行性和优越性。然后，通过插入原位AlN中间层，SAG Al2O3/AlN/GaN MISFET产生改善的频散和栅极沟道导通性能。为了进一步提高通道的导电性，提出了SAG部分凹栅Al2O3/AlGaN/GaN miss - hfet结构，实现了高Vth和高场效应的通道迁移率。这些结果表明，SAG法为绝缘凹槽栅GaN晶体管的制备提供了一条有前景的途径。
Recess structure is one of the main schemes for insulated-gate E-mode GaN transistors. In this work, selective area growth (SAG) is proposed to fabricate damage-free recess-gate device, and related progresses regarding process optimization and structure evolution have been reviewed. Firstly, the SAG process has been optimized by interface separation (conduction interface and regrowth interface) and n-type Si impurity removal to achieve high-quality AlGaN/GaN heterostructure. Compared to the traditional etching method, the feasibility and superiority of SAG scheme are demonstrated for realizing E-mode Al2O3/GaN MISFET with small Vth hysteresis. Then, by inserting an in situ AlN interlayer, the SAG Al2O3/AlN/GaN MISFET yields improved frequency dispersion and gate channel conduction performances. To further enhance the channel conduction, the SAG partially recess-gate Al2O3/AlGaN/GaN MIS-HFET structure is proposed, by which both high Vth and high-field-effect channel mobility have been achieved. Those results indicate that SAG method gives a perspective way for insulated-recess-gate GaN transistors fabrication.
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影响因子：
3.1
作者：
Saito, W;Takada, Y;Omura, I
通讯作者：
Omura, I
影响因子：
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作者：
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影响因子：
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