Using run-time reverse-engineering to optimize DRAM refresh
Using run-time reverse-engineering to optimize DRAM refresh
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使用运行时逆向工程来优化 DRAM 刷新
DOI：
10.1145/3132402.3132419
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发表时间：
2017
期刊：
影响因子：
--
通讯作者：
N. Wehn
中科院分区：
文献类型：
--
作者：
D. M. Mathew;É. F. Zulian;M. Jung;K. Kraft;C. Weis;B. Jacob;N. Wehn
DRAM刷新的开销随着每一代密度而增加。为了帮助抵消部分开销，JEDEC设计了一个高度优化的DRAM内部架构的modernAuto-Refreshcommand--这种架构违反了外部控制器在正常操作期间必须遵守和遵守的时序规则。许多刷新减少方案手动地逐行刷新DRAM，从而消除不必要的刷新以提高DRAM的能量和性能。然而，已经表明，现代自动刷新与这些方案不兼容，它们通过显式激活和预充电手动刷新指定的行，从而使它们无法利用内部可用于自动刷新操作的体系结构优化。本文表明，在正常DRAM操作期间应遵循的各种DRAM定时参数可以减少用于执行刷新操作，并且通过在系统初始化时对那些内部定时参数进行逆向工程，外部存储器控制器可以将它们与单独的ActivateandPrechargecommands结合使用，从而降低了自动刷新所提供的性能开销，同时支持逐行刷新减少方案。通过物理实验和测量，我们发现，我们的优化方案减少RFC高达45%相比，已经高度优化的自动刷新机制。与未优化的逐行刷新相比，它的能效提高了10%，性能提高了50%。通过模拟未来的16 Gb DDR4设备进行的进一步评估显示了RFC的减少如何提高应用性能和能源效率。所提出的技术增强了所有使用逐行刷新的现有刷新优化方案，并且它这样做而不需要对DRAM或DRAM协议进行任何修改。
The overhead of DRAM refresh is increasing with each density generation. To help offset some of this overhead, JEDEC designed the modernAuto-Refreshcommand with a highly optimized architecture internal to the DRAM---an architecture that violates the timing rules external controllers must observe and obey during normal operation. Numerous refresh-reduction schemes manually refresh the DRAM row-by-row, eliminating unnecessary refreshes to improve both energy and performance of the DRAM. However, it has been shown that modernAuto-Refreshis incompatible with these schemes, that their manual refreshing of specified rows through explicitActivateandPrechargeprecludes them from exploiting the architectural optimizations available internally forAuto-Refreshoperations.This paper shows that various DRAM timing parameters, which should be followed during normal DRAM operations can be reduced for performingRefreshoperation, and by reverse engineering those internal timing parameters at system-init time an external memory controller can use them in conjunction with individualActivateandPrechargecommands, thereby reducing the performance overhead affordedAuto-Refresh, while simultaneously supporting row-by-row refresh reduction schemes.Through physical experiments and measurement, we find that our optimized scheme reducestRFCby up to 45% compared to the already highly-optimizedAuto-Refreshmechanism. It is also 10% more energy-efficient and 50% more performance-efficient than the non-optimized row-by-row refresh. Further evaluations done by simulating future 16 Gb DDR4 devices show how the reduction intRFCimproves the application performance and energy efficiency. The proposed technique enhances all of the existing refresh-optimization schemes that use row-by-row refresh, and it does so without requiring any modification to the DRAM or DRAM protocol.
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DOI：
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发表时间：
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期刊：
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影响因子：
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DOI：
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发表时间：
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期刊：
Science China Information Sciences
影响因子：
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DOI：
10.1109/hpca.2016.7446093
发表时间：
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期刊：
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影响因子：
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