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Research in Circuit Layout

Research in Circuit Layout
电路布局研究
批准号:
8506901
负责人:
Ernest Kuh
金额:
$28.13万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
1985
资助国家:
美国
项目状态:
已结题
起止时间:
1985-07-01 至 1988-12-31
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中文摘要
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英文摘要
As the density of components on a VLSI chip continues to grow, the need to develop computer-aided tools for custom chips is crucial for the continued advance of VLSI technology. This research concentrates on custom chip layout, an area in which major breakthrough is expected in the next decade. The aim here is to develop theoretical knowledge, efficient algorithms, and experimental layout systems. The long-term plan is to develop a goal-oriented, hierarchical, building block system (an automatic custom layout system for placement and routing in VLSI design) for custom VLSI chips. Logical design, simulation, and physical layout are run in parallel to reduce design time and produce error-free layout. Hierarchical simulators are to be integrated with a hierarchical building block layout system. System flexibility will allow designer's intervention.
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CISE Postdoctoral Program: Research in Computer Aided Design of VLSI Circuits with Emphasis on Deep Submicron Technology
  • 批准号:
    9625910
  • 项目类别:
    Standard Grant
  • 资助金额:
    $2.09万
  • 财政年份:
    1996
  • 负责人:
    Ernest Kuh
  • 依托单位:
Research on Design Methodologies for High-Density, High- Performance, Wire-Dominated Chips and Multichip Modules
  • 批准号:
    9117328
  • 项目类别:
    Continuing Grant
  • 资助金额:
    $54.5万
  • 财政年份:
    1992
  • 负责人:
    Ernest Kuh
  • 依托单位:
Research on Layout, Interconnection, and Testing
  • 批准号:
    8803711
  • 项目类别:
    Continuing Grant
  • 资助金额:
    $38.9万
  • 财政年份:
    1988
  • 负责人:
    Ernest Kuh
  • 依托单位:
U.S.-China Cooperative Research: Theory and Algorithms For Layout Design
  • 批准号:
    8318395
  • 项目类别:
    Standard Grant
  • 资助金额:
    $1.98万
  • 财政年份:
    1984
  • 负责人:
    Ernest Kuh
  • 依托单位:
海外基金