Analog to Digital Conversion and Data Compression

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The goal of this research program is to provide exact analyses of over-sampled A/Ds, especially a variety of architectures for implementing a method known as sigma-delta modulation. Through the use of old and new techniques from nonlinear and linear systems theory, random processes, and ergodic theory, exact descriptions of the behavior of quantization noise for single-loop and multi- stage (cascaded) sigma-delta modulatory architectures for a variety of input signals (both with and without dithering) have been obtained. The thrust of the present proposal will be to extend these results to other architectures including a sigma-delta loop with leaky integrators and non-unity gain, modulo sigma-delta and parallel sigma-delta modulatory. Also, if time permits, other related topics will be examined including stability issues in feedback quantization, and the incorporation of subsequent signal processing (such as compression and linear filtering) into the A/D converter.