Analog CMOS Neural Circuits for Speech Recognition

非特定人连接语音的实时识别一直是电子系统面临的一个难题。低精度、高度并行的模拟神经网络已被证明能够使用标准分量识别依赖于说话人的小词汇量连接语音。该项目将研究和开发大规模并行定制集成电路，使用集成延迟线和模拟计算网络来执行这一任务。第一阶段将包括测试芯片的设计和制造，以证明我们开发的可行性。该方法将利用标准的现成的CMOS体集成电路技术，因此这项研究产生的产品可以由许多供应商可靠而经济地制造出来。P.I.已经演示了使用该技术来制造连续时间模拟计算网络和非线性判决电路。他还展示了使用浮动节点提供模拟电压的非易失性存储的可行性。这些电压可以用来控制芯片的操作，从而实现在现场学习或接受培训的能力。这项研究解决了实时语音识别这一具有挑战性的重要问题，并可能直接导致具有广泛商业适用性的廉价产品。

Real-time recognition of speaker-independent connected speech has proven to be a difficult problem for electronic systems. Low-precision highly-parallel analog neural networks have been shown to recognize speaker-dependent small- vocabulary connected speech using standard components. This project will research and develop massively-parallel custom integrated circuits that will perform this task, using integrated delay lines and analog computing networks. Phase I will include the design and fabrication of test chips to prove the feasibility of our development. The approach will utilize standard readily available CMOS Bulk integrated circuit technology so products arising from this research can be fabricated reliably and economically by a number of vendors. The P.I. has already demonstrated using this technology to fabricate continuous-time analog computing networks and non-linear decision circuits. He have also shown the feasibility of using floating-nodes to provide non-volatile storage of analog voltages. These voltages can be used to control the operation of the chip thus implementing the capability to learn or be trained in the field. This proposed research addresses the challenging and important problem of real-time speech recognition and may lead directly to inexpensive products with wide commercial applicability.