Analog CMOS Neural Circuits for Speech Recognition

非特定人语音的实时识别 连接的讲话已被证明是一个困难的 电子系统的问题。 低精度 高度并行的模拟神经网络 显示识别说话者相关的小- 词汇连接语音使用标准 件. 该项目将研究和 开发并行定制集成 将执行此任务的电路，使用 集成延迟线和模拟计算 网络. 第一阶段将包括设计和 制作测试芯片，以证明 我们的发展。 该方法将容易地利用标准 可用CMOS Bulk集成电路 技术，所以产品从这项研究中产生 可以通过以下方式可靠且经济地制造： 供应商的数量。 私家侦探已经 展示了用这种技术制造 连续时间模拟计算网络和 非线性决策电路 他还表示， 使用浮动节点提供 模拟电压的非易失性存储。 这些 电压可用于控制 芯片因此实现了学习的能力 或者接受实战训练 这项拟议的研究解决了具有挑战性的 实时语音的重要问题 承认，并可能直接导致廉价 产品具有广泛的商业应用性。

Real-time recognition of speaker-independent connected speech has proven to be a difficult problem for electronic systems. Low-precision highly-parallel analog neural networks have been shown to recognize speaker-dependent small- vocabulary connected speech using standard components. This project will research and develop massively-parallel custom integrated circuits that will perform this task, using integrated delay lines and analog computing networks. Phase I will include the design and fabrication of test chips to prove the feasibility of our development. The approach will utilize standard readily available CMOS Bulk integrated circuit technology so products arising from this research can be fabricated reliably and economically by a number of vendors. The P.I. has already demonstrated using this technology to fabricate continuous-time analog computing networks and non-linear decision circuits. He have also shown the feasibility of using floating-nodes to provide non-volatile storage of analog voltages. These voltages can be used to control the operation of the chip thus implementing the capability to learn or be trained in the field. This proposed research addresses the challenging and important problem of real-time speech recognition and may lead directly to inexpensive products with wide commercial applicability.