An Application-Specific Computer for Laplace's Equation

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The proposal is to investigate an application-specific computer architecture to solve a class of computer aided design simulation computations based on the Laplace equation. The goal is to solve typical problems in the class at five times the speed and one hundredth the cost of current supercomputers. The intent is to provide 0 (109) floating point operations per second for the solution of 0(106) node 3-D elliptic problems. Research being conducted is: (1) analyze and diagram the arithmetic operations and memory accesses of the iterative Laplace solver; (2) design the corresponding multi-FPU pipelined processor; (3) insure suitability of an existing memory board design and determine the number of vector memory ports (boards) necessary to sustain the pipeline; (4) program a simulator of the pipeline; and (5) plan wirewrap fabrication of the pipelined processor