Novel Methods in Computer-Aided Circuit Design and Testing Using Recursive Learning

本研究探讨了功耗的建模和估计，以及在设计抽象的各个层面（布局、逻辑、寄存器转移和行为层面）最小化功耗的技术。正在探索指导节能电子系统设计的原则和方法；目前正在评估低功耗设计技术对芯片、模块和系统级设计的影响。研究的主题包括：时空功率估计；低功率状态分配；布尔网络的功耗研究公共子表达式提取；低功耗FPGA合成。

This research investigates modeling and estimation of power consumption as well as techniques for minimizing power at the various levels of design abstraction (layout, logic, register- transfer and behavioral levels). Principles and methods to guide the design of power efficient electronic systems are being explored; and the impact of availability of low-power design techniques on chip, module, and system level designs is being assessed. Topics being investigated include: spatio-temporal power estimation; state assignment for low power; power dissipation in boolean networks; common subexpression extraction; and FPGA synthesis for low power.