Delay Test and Diagnosis Considering DSM and Power

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Proposal ID: 0702669 PI name: Walker Duncan, MPI Institution: Texas A & M UniversityTitle: Delay Test and Diagnosis Considering DSM and PowerABSTRACTThe goal of this research is to develop semiconductor manufacturing tests that verify the clock frequency of integrated circuits with high confidence but low cost. This is known as "delay test". Delay test is increasingly difficult due to increasing variability in new semiconductor manufacturing processes, and increasing power and wiring densities on the chip.Traditional delay test techniques are becoming too expensive or too inaccurate for their continued use. If a chip is slow, the second goal of this research is to figure out why, so that either the design or the manufacturing process can be fixed, in order to ship chips at the desired clock frequency. This is critical to earning a return on multi-billion dollar factory and design investments. The intellectual merit of the research is that it has the potential to significantly improve chip quality or reduce manufacturing costs. The broader impact is the education of undergraduate and graduate students, and the development of new course materials and software for wider distribution.