Reliability Screening via Outlier Analysis

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Testing integrated circuit chips at elevated temperature and voltage,known as burn-in testing, is used to improve product reliability byscreening out chips that pass all their regular tests, but might failduring customer use. Burn-in of high performance chips such asmicroprocessors requires increasingly expensive power and temperaturecontrol to avoid destroying good chips. Burn-in test is also becomingless effective in newer technologies. The combination of theseproblems means that burn-in test can now cost more than regular chiptesting for high-performance products. Burn-in test is already tooexpensive for many products, even though they have high reliabilityrequirements.One way to improve chip reliability without burn-in is to throw awaychips which are "different" from the rest of the chips. They aredifferent in that they work correctly, but some measurements haveabnormal values. These "black sheep" chips are known to statisticiansas "outliers". What makes this problem challenging is that pastexperience shows that most of the chips thrown away will work justfine for the customer. So throwing them away represents lost profitsto the manufacturer. The research goal is to find techniques that moreaccurately identify outliers that would fail for the customer.There are two research challenges. The first is to identify a set ofmeasurements that are good at detecting outliers. The second is todetermine when a measurement is so abnormal that a chip should bethrown away. Historically the standby power consumed by a chip hasworked well for detecting outliers. However this is becoming less soin new technologies. New ideas are to consider other measurements,such as behavior under abnormally low operating voltages, or howdifferent a chip is from its neighbors on the semiconductorwafer. This research will evaluate these and other ideas using chipdata from IBM, LSI Logic and Texas Instruments to identify approachesthat work well in practice. The primary merit of the research is thatit will develop techniques to reduce chip manufacturing costs andimprove the reliability of chips shipped to customers.