Vertical Isolation for Very Large Scale Integration Circuits Formed by Low Temperature Oxidation of Silicon

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9412550 Alford Research will be carried out to develop a fundamental understanding of the processes associated with the low temperature oxidation of Silicon in contact with Cu silicide. It is planned to: 1) investigate the kinetics of the phenomena, 2)characterize the oxide layer, and 3)use the orientation dependence on growth rate to form vertical isolation oxides in integrated circuits. We expect to characterize the growth kinetics to obtain activation energy, substrate orientation, identity of moving species through the use of implanted markers, and the influence of dopants and impurities. The integrity of the grown oxide will be quantified by electrical measurements of metal oxide capacitor structures, ion beam analysis of composition, density, and impurities, and transmission electron microscopy to assess microstructure properties. %%% The primary goal of this program is to develop a fundamental understanding of the low temperature oxidation of Silicon in contact with Cu silicide. An important feature of the project is the training of students in a fundamentally and technologically significant area of materials and processing research. This research will contribute to improving the general perform ance of advanced devices and integrated circuits used in computing, information processing, and tele communica tions. ***