Multilayer Josephson Junction Digital Devices

这项拨款的目的是研究传统的和新型的超导数字通量量子器件，采用相对年轻的多层约瑟夫森结技术，有n个超导体绝缘体（SI）层。这项工作涉及多层结和器件行为的广泛数值模拟。本项目将从以前的计算和实验研究的结果中提取，这些研究是在NSF研究计划资助期间进行的。提出的研究的主要重点将是通量量子电路的数值模拟，其中多层结既可以作为非线性动力学电感器（无源器件）来增加电路集成密度，也可以作为单层三层结替代品（有源器件）来允许新的逻辑/电压阈值，新颖的器件设计，器件容错性和抗热噪声。目标将是优化电路设计，以最大限度地提高参数变化公差，并包括串扰、寄生电容和电感等现实考虑因素，以便可以生产适合制造测试原型的光刻掩模。传统的数字器件，如选择逻辑和存储电路，将考虑最佳的几何和性能。由于局部存储器和处理的自然集成，通量量子电路提供了独特的操作特性，并通过多层结技术进一步开发，因此将分析几种新型器件，特别是在基于神经的计算和半导体接口领域。如果超导数字电路要达到其低功耗所允许的集成密度，并且如果它要在多个小众应用中与室温半导体数字电路竞争，那么必须进行诸如本文所建议的工作。＊＊＊

9500279 Lomatch The objectives of this grant are to study conventional and novel superconducting digital flux quantum devices employing the relatively young technology of multilayer Josephson junctions with n superconductor-insulator (SI) layers. The work involves the extensive numerical modeling of multilayer junction and device behavior. This program will draw from the results of previous computational and experimental studies, which took place during the period covered by an NSF Research Planning Grant. A primary focus of the proposed research will be the numerical simulation of flux quantum circuitry in which multilayer junctions both serve as nonlinear kinetic inductors (passive devices) to increase circuit integration density, and as single trilayer junction replacements (active devices) to allow for new logic/voltage thresholds, novel device designs, device fault tolerance, and resistance to thermal noise. The goal will be to optimize circuit designs to maximize parameter variation tolerances, and to include realistic considerations such as crosstalk and parasitic capacitance's and inductances so that one may produce lithographic masks suitable for the fabrication of test prototypes. Conventional digital devices, such as select logic and memory circuitry, will be considered for optimum geometry and performance. the unique operational features offered by flux quantum circuitry due to the natural integration of local memory and processing are further exploited by multilayer junction technology, so several novel devices will be analyzed, particularly in the area of neural-based computing and semiconductor interfacing. If superconducting digital circuitry is to achieve the integration density that its low power dissipation allows, and if it is to compete with room temperature semiconducting digital circuitry in more than a few small niche applications, then work such as the proposed here must be pursued. ***