Multilayer Josephson Junction Digital Devices

多层约瑟夫森结数字器件

• 批准号: 9500279
• 负责人: John Ketterson
• 金额: $ 31.98万
• 依托单位: Northwestern University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1995
• 资助国家: 美国
• 起止时间: 1995-07-01 至 1999-04-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9500279&HistoricalAwards=false
• 关键词: Multilayer; Josephson; Junction; Digital; Devices

9500279 Lomatch The objectives of this grant are to study conventional and novel superconducting digital flux quantum devices employing the relatively young technology of multilayer Josephson junctions with n superconductor-insulator (SI) layers. The work involves the extensive numerical modeling of multilayer junction and device behavior. This program will draw from the results of previous computational and experimental studies, which took place during the period covered by an NSF Research Planning Grant. A primary focus of the proposed research will be the numerical simulation of flux quantum circuitry in which multilayer junctions both serve as nonlinear kinetic inductors (passive devices) to increase circuit integration density, and as single trilayer junction replacements (active devices) to allow for new logic/voltage thresholds, novel device designs, device fault tolerance, and resistance to thermal noise. The goal will be to optimize circuit designs to maximize parameter variation tolerances, and to include realistic considerations such as crosstalk and parasitic capacitance's and inductances so that one may produce lithographic masks suitable for the fabrication of test prototypes. Conventional digital devices, such as select logic and memory circuitry, will be considered for optimum geometry and performance. the unique operational features offered by flux quantum circuitry due to the natural integration of local memory and processing are further exploited by multilayer junction technology, so several novel devices will be analyzed, particularly in the area of neural-based computing and semiconductor interfacing. If superconducting digital circuitry is to achieve the integration density that its low power dissipation allows, and if it is to compete with room temperature semiconducting digital circuitry in more than a few small niche applications, then work such as the proposed here must be pursued. ***

9500279 Lomatch该补助金的目的是研究传统的和新型的超导数字通量量子器件，采用相对年轻的多层约瑟夫森结与n超导体绝缘体（SI）层的技术。 这项工作涉及多层结和器件行为的广泛的数值模拟。 该计划将借鉴以前的计算和实验研究的结果，这些研究发生在NSF研究规划资助所涵盖的时期。 拟议的研究的一个主要重点将是通量量子电路的数值模拟，其中多层结都作为非线性动力学电感器（无源器件），以增加电路集成密度，并作为单一的三层结的替代品（有源器件），以允许新的逻辑/电压阈值，新颖的器件设计，器件容错性，和热噪声电阻。 我们的目标是优化电路设计，以最大限度地提高参数变化的公差，并包括现实的考虑因素，如串扰和寄生电容和电感，使一个可以生产适合于制造测试原型的光刻掩模。 传统的数字设备，如选择逻辑和存储器电路，将被认为是最佳的几何形状和性能。 由于局部存储器和处理的自然集成，通量量子电路提供的独特操作特征被多层结技术进一步利用，因此将分析几种新颖的器件，特别是在基于神经的计算和半导体接口领域。 如果超导数字电路要实现其低功耗所允许的集成密度，并且如果它要在几个以上的小利基应用中与室温半导体数字电路竞争，那么必须进行本文所提出的工作。 ***