A Statistical Modeling Methodology for Submicron MOS Devices and Circuits

集成电路的性能取决于设计者的选择和工艺工程师在器件制造期间的决定。 通常情况下，选择和决策是相互独立的，很少意识到这两个工程领域的相互作用。 这项研究开发的方法，提高设计人员的意识的电路实现参数的影响，并敏感的工艺工程师的处理决策对最终电路的性能的影响。 一个统计模型的开发相关的设备和工艺参数，主要是建立在复制电路的空间和工艺依赖性的电路性能变化。 电路模拟器用于解决所产生的（巨大的）一组非线性微分方程。 理由

The performance of an integrated circuit depends on the designers' choices and the process engineers' decisions during the manufacture of the device. Typically the choices and decisions are independent of each other with little awareness of the interplay of the two engineering domains. This research develops methods for raising the designers' awareness of the effects of circuit implementation parameters and to sensitize process engineers to the impact of processing decisions on the performance of the final circuit. A statistical model is developed to correlate device and process parameters, primarily to establish circuit performance variations on spatial and process dependencies in replicated circuits. Circuit simulators are used to solve the resultant (huge) set of nollinear differential equations. JUSTIFICATION