I-CORPS: A Tooolset for Lifetime Evaluation of Circuits and Systems

I-CORPS:电路和系统寿命评估工具集

基本信息

  • 批准号:
    1559050
  • 负责人:
  • 金额:
    $ 5万
  • 依托单位:
  • 依托单位国家:
    美国
  • 项目类别:
    Standard Grant
  • 财政年份:
    2015
  • 资助国家:
    美国
  • 起止时间:
    2015-09-15 至 2016-02-29
  • 项目状态:
    已结题

项目摘要

Electronic circuits degrade during operation. Eventually, the degradation is so large that it causes the circuits to no longer function properly. Customers of electronic devices expect a 10 year lifetime. Manufacturers currently check lifetime using manufactured samples of prototype circuits. Failures of lifetime tests are very costly and entail additional re-design engineering costs and the cost of re-fabrication (hundreds of thousands of dollars). This project will develop software to estimate the lifetime of electronic devices. The toolset that will be developed will check if a design can meet lifetime requirements prior to the manufacturing of prototypes and will provide guidance on the components of a design that need to be fixed so as to improve the lifetime of the full system.The project will develop software to enable semiconductor design companies to improve the lifetime of their products and to detect the components of a design that can limit the products' lifetime. This will be done with simulation tools that estimate the lifetime distributions of circuits while taking into account a wide variety of wearout mechanisms and operating conditions. The software will compute activity and temperature profiles of full systems. These are linked to the physical layout and transistor models to compute feature/transistor-level wearout statistics. The feature/transistor-level wearout statistics are combined to identify vulnerable blocks/components and to estimate the lifetime distribution of the full electronic system. The team will conduct customer dicovery to gain further insights further insights into the problem and to validate the proposed hypotheses.
电子线路在运行过程中会退化。最终,降级会如此之大,导致电路不再正常工作。电子设备的客户预计使用寿命为10年。制造商目前使用原型电路的制造样本来检查寿命。寿命试验的失败是非常昂贵的,并需要额外的重新设计工程成本和重新制造的成本(数十万美元)。该项目将开发软件来估计电子设备的寿命。将开发的工具包将在制造原型之前检查设计是否满足寿命要求,并将就需要修复的设计组件提供指导,以提高整个系统的寿命。该项目将开发软件,使半导体设计公司能够延长其产品的寿命,并检测可能限制产品寿命的设计组件。这将使用模拟工具来完成,该工具可以估计电路的寿命分布,同时考虑到各种磨损机制和运行条件。该软件将计算整个系统的活动和温度分布。这些被链接到物理布局和晶体管模型,以计算特征/晶体管级别的损耗统计数据。结合特征/晶体管级磨损统计数据来识别易受攻击的块/部件,并估计整个电子系统的寿命分布。该团队将进行客户口述,以获得进一步的洞察,对问题的进一步洞察,并验证拟议的假设。

项目成果

期刊论文数量(0)
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Linda Milor其他文献

Backend dielectric reliability simulator for microprocessor system
  • DOI:
    10.1016/j.microrel.2012.07.002
  • 发表时间:
    2012-09-01
  • 期刊:
  • 影响因子:
  • 作者:
    Chang-Chih Chen;Fahad Ahmed;Dae Hyun Kim;Sung Kyu Lim;Linda Milor
  • 通讯作者:
    Linda Milor
Impact of NBTI/PBTIon SRAMs within microprocessor systems: Modeling, simulation, and analysis
  • DOI:
    10.1016/j.microrel.2013.06.003
  • 发表时间:
    2013-09-01
  • 期刊:
  • 影响因子:
  • 作者:
    Chang-Chih Chen;Fahad Ahmed;Linda Milor
  • 通讯作者:
    Linda Milor
Backend dielectric breakdown dependence on linewidth and pattern density
  • DOI:
    10.1016/j.microrel.2007.07.023
  • 发表时间:
    2007-09-01
  • 期刊:
  • 影响因子:
  • 作者:
    Linda Milor;Changsoo Hong
  • 通讯作者:
    Changsoo Hong
Via wearout detection with on-chip monitors
  • DOI:
    10.1016/j.mejo.2010.01.006
  • 发表时间:
    2010-11-01
  • 期刊:
  • 影响因子:
  • 作者:
    Fahad Ahmed;Linda Milor
  • 通讯作者:
    Linda Milor
Simulation of system backend dielectric reliability
  • DOI:
    10.1016/j.mejo.2014.01.008
  • 发表时间:
    2014-10-01
  • 期刊:
  • 影响因子:
  • 作者:
    Chang-Chih Chen;Muhammad Bashir;Linda Milor;Dae Hyun Kim;Sung Kyu Lim
  • 通讯作者:
    Sung Kyu Lim

Linda Milor的其他文献

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{{ truncateString('Linda Milor', 18)}}的其他基金

PFI:AIR - TT: RelMaster: Towards a Reliability Simulation Toolset
PFI:AIR - TT:RelMaster:迈向可靠性仿真工具集
  • 批准号:
    1700914
  • 财政年份:
    2017
  • 资助金额:
    $ 5万
  • 项目类别:
    Standard Grant
SHF: Small: Collaborative Research: Unified Framework for Adaptive Analog and Digital Performance Characterization Using Learned Information from the Circuit Under Test
SHF:小型:协作研究:使用从被测电路中学到的信息进行自适应模拟和数字性能表征的统一框架
  • 批准号:
    1116786
  • 财政年份:
    2011
  • 资助金额:
    $ 5万
  • 项目类别:
    Standard Grant
Physical Modeling of Low-K Dielectric Breakdown and the Estimation of Full Chip Lifetime
低 K 电介质击穿的物理建模和全芯片寿命的估计
  • 批准号:
    0901576
  • 财政年份:
    2009
  • 资助金额:
    $ 5万
  • 项目类别:
    Standard Grant
Collaborative Research: Hierarchical Testing and Yield Enhancement of High End Integrated RF Systems
合作研究:高端集成射频系统的分层测试和良率提升
  • 批准号:
    0541005
  • 财政年份:
    2006
  • 资助金额:
    $ 5万
  • 项目类别:
    Continuing Grant
A Statistical Modeling Methodology for Submicron MOS Devices and Circuits
亚微米 MOS 器件和电路的统计建模方法
  • 批准号:
    9501912
  • 财政年份:
    1995
  • 资助金额:
    $ 5万
  • 项目类别:
    Standard Grant
RIA: Statistical Design of Analog and Mixed Signal Circuits
RIA:模拟和混合信号电路的统计设计
  • 批准号:
    9211407
  • 财政年份:
    1992
  • 资助金额:
    $ 5万
  • 项目类别:
    Standard Grant
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